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Name	Size	Permission	Date
sanitizer	[ DIR ]	drwxr-xr-x	2025-04-02 10:31
adxintrin.h	2.8 KB	-rw-r--r--	2025-03-31 10:29
ammintrin.h	3.14 KB	-rw-r--r--	2025-03-31 10:29
avx2intrin.h	57.26 KB	-rw-r--r--	2025-03-31 10:29
avx5124fmapsintrin.h	6.38 KB	-rw-r--r--	2025-03-31 10:29
avx5124vnniwintrin.h	4.16 KB	-rw-r--r--	2025-03-31 10:29
avx512bitalgintrin.h	8.64 KB	-rw-r--r--	2025-03-31 10:29
avx512bwintrin.h	99.13 KB	-rw-r--r--	2025-03-31 10:29
avx512cdintrin.h	5.69 KB	-rw-r--r--	2025-03-31 10:29
avx512dqintrin.h	83.37 KB	-rw-r--r--	2025-03-31 10:29
avx512erintrin.h	12.66 KB	-rw-r--r--	2025-03-31 10:29
avx512fintrin.h	475.38 KB	-rw-r--r--	2025-03-31 10:29
avx512ifmaintrin.h	3.35 KB	-rw-r--r--	2025-03-31 10:29
avx512ifmavlintrin.h	5.26 KB	-rw-r--r--	2025-03-31 10:29
avx512pfintrin.h	10.05 KB	-rw-r--r--	2025-03-31 10:29
avx512vbmi2intrin.h	19.35 KB	-rw-r--r--	2025-03-31 10:29
avx512vbmi2vlintrin.h	36.25 KB	-rw-r--r--	2025-03-31 10:29
avx512vbmiintrin.h	4.81 KB	-rw-r--r--	2025-03-31 10:29
avx512vbmivlintrin.h	8.17 KB	-rw-r--r--	2025-03-31 10:29
avx512vlbwintrin.h	140.48 KB	-rw-r--r--	2025-03-31 10:29
avx512vldqintrin.h	59.88 KB	-rw-r--r--	2025-03-31 10:29
avx512vlintrin.h	414.04 KB	-rw-r--r--	2025-03-31 10:29
avx512vnniintrin.h	4.85 KB	-rw-r--r--	2025-03-31 10:29
avx512vnnivlintrin.h	8.05 KB	-rw-r--r--	2025-03-31 10:29
avx512vpopcntdqintrin.h	3.04 KB	-rw-r--r--	2025-03-31 10:29
avx512vpopcntdqvlintrin.h	4.56 KB	-rw-r--r--	2025-03-31 10:29
avxintrin.h	49.43 KB	-rw-r--r--	2025-03-31 10:29
bmi2intrin.h	3.31 KB	-rw-r--r--	2025-03-31 10:29
bmiintrin.h	5.5 KB	-rw-r--r--	2025-03-31 10:29
bmmintrin.h	1.13 KB	-rw-r--r--	2025-03-31 10:29
cet.h	2.6 KB	-rw-r--r--	2025-03-31 10:29
cetintrin.h	3.25 KB	-rw-r--r--	2025-03-31 10:29
clflushoptintrin.h	1.62 KB	-rw-r--r--	2025-03-31 10:29
clwbintrin.h	1.55 KB	-rw-r--r--	2025-03-31 10:29
clzerointrin.h	1.46 KB	-rw-r--r--	2025-03-31 10:29
cpuid.h	8.72 KB	-rw-r--r--	2025-03-31 10:29
cross-stdarg.h	2.5 KB	-rw-r--r--	2025-03-31 10:29
emmintrin.h	49.84 KB	-rw-r--r--	2025-03-31 10:29
f16cintrin.h	3.33 KB	-rw-r--r--	2025-03-31 10:29
float.h	16.52 KB	-rw-r--r--	2025-03-31 10:29
fma4intrin.h	8.92 KB	-rw-r--r--	2025-03-31 10:29
fmaintrin.h	10.29 KB	-rw-r--r--	2025-03-31 10:29
fxsrintrin.h	2.06 KB	-rw-r--r--	2025-03-31 10:29
gcov.h	1.36 KB	-rw-r--r--	2025-03-31 10:36
gfniintrin.h	14.7 KB	-rw-r--r--	2025-03-31 10:29
ia32intrin.h	7.69 KB	-rw-r--r--	2025-03-31 10:29
immintrin.h	5.33 KB	-rw-r--r--	2025-03-31 10:29
iso646.h	1.24 KB	-rw-r--r--	2025-03-31 10:29
limits.h	5.95 KB	-rw-r--r--	2025-03-31 10:29
lwpintrin.h	3.32 KB	-rw-r--r--	2025-03-31 10:29
lzcntintrin.h	2.34 KB	-rw-r--r--	2025-03-31 10:29
mm3dnow.h	6.91 KB	-rw-r--r--	2025-03-31 10:29
mm_malloc.h	1.74 KB	-rw-r--r--	2025-03-31 10:29
mmintrin.h	30.62 KB	-rw-r--r--	2025-03-31 10:29
movdirintrin.h	2.29 KB	-rw-r--r--	2025-03-31 10:29
mwaitxintrin.h	1.71 KB	-rw-r--r--	2025-03-31 10:29
nmmintrin.h	1.26 KB	-rw-r--r--	2025-03-31 10:29
omp.h	5.85 KB	-rw-r--r--	2025-03-31 10:36
openacc.h	4.53 KB	-rw-r--r--	2025-03-31 10:36
pconfigintrin.h	2.29 KB	-rw-r--r--	2025-03-31 10:29
pkuintrin.h	1.7 KB	-rw-r--r--	2025-03-31 10:29
pmmintrin.h	4.27 KB	-rw-r--r--	2025-03-31 10:29
popcntintrin.h	1.71 KB	-rw-r--r--	2025-03-31 10:29
prfchwintrin.h	1.41 KB	-rw-r--r--	2025-03-31 10:29
rdseedintrin.h	1.97 KB	-rw-r--r--	2025-03-31 10:29
rtmintrin.h	2.67 KB	-rw-r--r--	2025-03-31 10:29
sgxintrin.h	6.92 KB	-rw-r--r--	2025-03-31 10:29
shaintrin.h	3.13 KB	-rw-r--r--	2025-03-31 10:29
smmintrin.h	27.74 KB	-rw-r--r--	2025-03-31 10:29
stdalign.h	1.18 KB	-rw-r--r--	2025-03-31 10:29
stdarg.h	3.98 KB	-rw-r--r--	2025-03-31 10:29
stdatomic.h	9.1 KB	-rw-r--r--	2025-03-31 10:29
stdbool.h	1.49 KB	-rw-r--r--	2025-03-31 10:29
stddef.h	13.81 KB	-rw-r--r--	2025-03-31 10:29
stdfix.h	5.86 KB	-rw-r--r--	2025-03-31 10:29
stdint-gcc.h	9.24 KB	-rw-r--r--	2025-03-31 10:29
stdint.h	328 B	-rw-r--r--	2025-03-31 10:29
stdnoreturn.h	1.11 KB	-rw-r--r--	2025-03-31 10:29
syslimits.h	330 B	-rw-r--r--	2025-03-31 10:07
tbmintrin.h	5.12 KB	-rw-r--r--	2025-03-31 10:29
tmmintrin.h	8.15 KB	-rw-r--r--	2025-03-31 10:29
unwind.h	10.65 KB	-rw-r--r--	2025-03-31 10:36
vaesintrin.h	4.55 KB	-rw-r--r--	2025-03-31 10:29
varargs.h	139 B	-rw-r--r--	2025-03-31 10:29
vpclmulqdqintrin.h	3.4 KB	-rw-r--r--	2025-03-31 10:29
wbnoinvdintrin.h	1.58 KB	-rw-r--r--	2025-03-31 10:29
wmmintrin.h	4.55 KB	-rw-r--r--	2025-03-31 10:29
x86intrin.h	2.06 KB	-rw-r--r--	2025-03-31 10:29
xmmintrin.h	41.22 KB	-rw-r--r--	2025-03-31 10:29
xopintrin.h	27.9 KB	-rw-r--r--	2025-03-31 10:29
xsavecintrin.h	1.78 KB	-rw-r--r--	2025-03-31 10:29
xsaveintrin.h	2.46 KB	-rw-r--r--	2025-03-31 10:29
xsaveoptintrin.h	1.86 KB	-rw-r--r--	2025-03-31 10:29
xsavesintrin.h	2.11 KB	-rw-r--r--	2025-03-31 10:29
xtestintrin.h	1.65 KB	-rw-r--r--	2025-03-31 10:29

Rename

This file is part of GCC.

GCC is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3, or (at your option)
   any later version.

GCC is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

Under Section 7 of GPL version 3, you are granted additional
   permissions described in the GCC Runtime Library Exception, version
   3.1, as published by the Free Software Foundation.

You should have received a copy of the GNU General Public License and
   a copy of the GCC Runtime Library Exception along with this program;
   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
   <http://www.gnu.org/licenses/>.  */

#if !defined _IMMINTRIN_H_INCLUDED
# error "Never use <avx512bitalgintrin.h> directly; include <x86intrin.h> instead."
#endif

#ifndef _AVX512BITALGINTRIN_H_INCLUDED
#define _AVX512BITALGINTRIN_H_INCLUDED

#ifndef __AVX512BITALG__
#pragma GCC push_options
#pragma GCC target("avx512bitalg")
#define __DISABLE_AVX512BITALG__
#endif /* __AVX512BITALG__ */

extern __inline __m512i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm512_popcnt_epi8 (__m512i __A)
{
  return (__m512i) __builtin_ia32_vpopcountb_v64qi ((__v64qi) __A);
}

extern __inline __m512i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm512_popcnt_epi16 (__m512i __A)
{
  return (__m512i) __builtin_ia32_vpopcountw_v32hi ((__v32hi) __A);
}

#ifdef __DISABLE_AVX512BITALG__
#undef __DISABLE_AVX512BITALG__
#pragma GCC pop_options
#endif /* __DISABLE_AVX512BITALG__ */

#if !defined(__AVX512BITALG__) || !defined(__AVX512BW__)
#pragma GCC push_options
#pragma GCC target("avx512bitalg,avx512bw")
#define __DISABLE_AVX512BITALGBW__
#endif /* __AVX512VLBW__ */

extern __inline __m512i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm512_mask_popcnt_epi8 (__m512i __W, __mmask64 __U, __m512i __A)
{
  return (__m512i) __builtin_ia32_vpopcountb_v64qi_mask ((__v64qi) __A,
							 (__v64qi) __W,
							 (__mmask64) __U);
}

extern __inline __m512i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm512_maskz_popcnt_epi8 (__mmask64 __U, __m512i __A)
{
  return (__m512i) __builtin_ia32_vpopcountb_v64qi_mask ((__v64qi) __A,
						(__v64qi)
						_mm512_setzero_si512 (),
						(__mmask64) __U);
}
extern __inline __m512i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm512_mask_popcnt_epi16 (__m512i __W, __mmask32 __U, __m512i __A)
{
  return (__m512i) __builtin_ia32_vpopcountw_v32hi_mask ((__v32hi) __A,
							(__v32hi) __W,
							(__mmask32) __U);
}

extern __inline __m512i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm512_maskz_popcnt_epi16 (__mmask32 __U, __m512i __A)
{
  return (__m512i) __builtin_ia32_vpopcountw_v32hi_mask ((__v32hi) __A,
						(__v32hi)
						_mm512_setzero_si512 (),
						(__mmask32) __U);
}

extern __inline __mmask64
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm512_bitshuffle_epi64_mask (__m512i __A, __m512i __B)
{
  return (__mmask64) __builtin_ia32_vpshufbitqmb512_mask ((__v64qi) __A,
						 (__v64qi) __B,
						 (__mmask64) -1);
}

extern __inline __mmask64
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm512_mask_bitshuffle_epi64_mask (__mmask64 __M, __m512i __A, __m512i __B)
{
  return (__mmask64) __builtin_ia32_vpshufbitqmb512_mask ((__v64qi) __A,
						 (__v64qi) __B,
						 (__mmask64) __M);
}

#ifdef __DISABLE_AVX512BITALGBW__
#undef __DISABLE_AVX512BITALGBW__
#pragma GCC pop_options
#endif /* __DISABLE_AVX512BITALGBW__ */

#if !defined(__AVX512BITALG__) || !defined(__AVX512VL__) || !defined(__AVX512BW__)
#pragma GCC push_options
#pragma GCC target("avx512bitalg,avx512vl,avx512bw")
#define __DISABLE_AVX512BITALGVLBW__
#endif /* __AVX512VLBW__ */

extern __inline __m256i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm256_mask_popcnt_epi8 (__m256i __W, __mmask32 __U, __m256i __A)
{
  return (__m256i) __builtin_ia32_vpopcountb_v32qi_mask ((__v32qi) __A,
							 (__v32qi) __W,
							 (__mmask32) __U);
}

extern __inline __m256i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm256_maskz_popcnt_epi8 (__mmask32 __U, __m256i __A)
{
  return (__m256i) __builtin_ia32_vpopcountb_v32qi_mask ((__v32qi) __A,
						(__v32qi)
						 _mm256_setzero_si256 (),
						(__mmask32) __U);
}

extern __inline __mmask32
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm256_bitshuffle_epi64_mask (__m256i __A, __m256i __B)
{
  return (__mmask32) __builtin_ia32_vpshufbitqmb256_mask ((__v32qi) __A,
						 (__v32qi) __B,
						 (__mmask32) -1);
}

extern __inline __mmask32
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm256_mask_bitshuffle_epi64_mask (__mmask32 __M, __m256i __A, __m256i __B)
{
  return (__mmask32) __builtin_ia32_vpshufbitqmb256_mask ((__v32qi) __A,
						 (__v32qi) __B,
						 (__mmask32) __M);
}

#ifdef __DISABLE_AVX512BITALGVLBW__
#undef __DISABLE_AVX512BITALGVLBW__
#pragma GCC pop_options
#endif /* __DISABLE_AVX512BITALGVLBW__ */

#if !defined(__AVX512BITALG__) || !defined(__AVX512VL__)
#pragma GCC push_options
#pragma GCC target("avx512bitalg,avx512vl")
#define __DISABLE_AVX512BITALGVL__
#endif /* __AVX512VLBW__ */

extern __inline __mmask16
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_bitshuffle_epi64_mask (__m128i __A, __m128i __B)
{
  return (__mmask16) __builtin_ia32_vpshufbitqmb128_mask ((__v16qi) __A,
						 (__v16qi) __B,
						 (__mmask16) -1);
}

extern __inline __mmask16
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_mask_bitshuffle_epi64_mask (__mmask16 __M, __m128i __A, __m128i __B)
{
  return (__mmask16) __builtin_ia32_vpshufbitqmb128_mask ((__v16qi) __A,
						 (__v16qi) __B,
						 (__mmask16) __M);
}

extern __inline __m256i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm256_popcnt_epi8 (__m256i __A)
{
  return (__m256i) __builtin_ia32_vpopcountb_v32qi ((__v32qi) __A);
}

extern __inline __m256i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm256_popcnt_epi16 (__m256i __A)
{
  return (__m256i) __builtin_ia32_vpopcountw_v16hi ((__v16hi) __A);
}

extern __inline __m128i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_popcnt_epi8 (__m128i __A)
{
  return (__m128i) __builtin_ia32_vpopcountb_v16qi ((__v16qi) __A);
}

extern __inline __m128i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_popcnt_epi16 (__m128i __A)
{
  return (__m128i) __builtin_ia32_vpopcountw_v8hi ((__v8hi) __A);
}

extern __inline __m256i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm256_mask_popcnt_epi16 (__m256i __W, __mmask16 __U, __m256i __A)
{
  return (__m256i) __builtin_ia32_vpopcountw_v16hi_mask ((__v16hi) __A,
							(__v16hi) __W,
							(__mmask16) __U);
}

extern __inline __m256i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm256_maskz_popcnt_epi16 (__mmask16 __U, __m256i __A)
{
  return (__m256i) __builtin_ia32_vpopcountw_v16hi_mask ((__v16hi) __A,
						(__v16hi)
						_mm256_setzero_si256 (),
						(__mmask16) __U);
}

extern __inline __m128i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_mask_popcnt_epi8 (__m128i __W, __mmask16 __U, __m128i __A)
{
  return (__m128i) __builtin_ia32_vpopcountb_v16qi_mask ((__v16qi) __A,
							 (__v16qi) __W,
							 (__mmask16) __U);
}

extern __inline __m128i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_maskz_popcnt_epi8 (__mmask16 __U, __m128i __A)
{
  return (__m128i) __builtin_ia32_vpopcountb_v16qi_mask ((__v16qi) __A,
							 (__v16qi)
							 _mm_setzero_si128 (),
							 (__mmask16) __U);
}
extern __inline __m128i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_mask_popcnt_epi16 (__m128i __W, __mmask8 __U, __m128i __A)
{
  return (__m128i) __builtin_ia32_vpopcountw_v8hi_mask ((__v8hi) __A,
							(__v8hi) __W,
							(__mmask8) __U);
}

extern __inline __m128i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_maskz_popcnt_epi16 (__mmask8 __U, __m128i __A)
{
  return (__m128i) __builtin_ia32_vpopcountw_v8hi_mask ((__v8hi) __A,
							(__v8hi)
							_mm_setzero_si128 (),
							(__mmask8) __U);
}
#ifdef __DISABLE_AVX512BITALGVL__
#undef __DISABLE_AVX512BITALGVL__
#pragma GCC pop_options
#endif /* __DISABLE_AVX512BITALGBW__ */

#endif /* _AVX512BITALGINTRIN_H_INCLUDED */