Gecko [ www.corporacionhdm.com.pe ]

Name	Size	Permission	Date
cuda_wrappers	[ DIR ]	drwxr-xr-x	2025-06-02 12:56
llvm_libc_wrappers	[ DIR ]	drwxr-xr-x	2025-06-02 12:56
openmp_wrappers	[ DIR ]	drwxr-xr-x	2025-06-02 12:56
ppc_wrappers	[ DIR ]	drwxr-xr-x	2025-06-02 12:56
__clang_cuda_builtin_vars.h	4.78 KB	-rw-r--r--	2023-11-28 08:52
__clang_cuda_cmath.h	18.06 KB	-rw-r--r--	2023-11-28 08:52
__clang_cuda_complex_builtins.h	9.36 KB	-rw-r--r--	2023-11-28 08:52
__clang_cuda_device_functions.h	56.68 KB	-rw-r--r--	2023-11-28 08:52
__clang_cuda_intrinsics.h	29.93 KB	-rw-r--r--	2023-11-28 08:52
__clang_cuda_libdevice_declares.h	21.87 KB	-rw-r--r--	2023-11-28 08:52
__clang_cuda_math.h	15.99 KB	-rw-r--r--	2023-11-28 08:52
__clang_cuda_math_forward_declares.h	8.27 KB	-rw-r--r--	2023-11-28 08:52
__clang_cuda_runtime_wrapper.h	17.61 KB	-rw-r--r--	2023-11-28 08:52
__clang_cuda_texture_intrinsics.h	31.86 KB	-rw-r--r--	2023-11-28 08:52
__clang_hip_cmath.h	26.34 KB	-rw-r--r--	2023-11-28 08:52
__clang_hip_libdevice_declares.h	19.87 KB	-rw-r--r--	2023-11-28 08:52
__clang_hip_math.h	31.96 KB	-rw-r--r--	2023-11-28 08:52
__clang_hip_runtime_wrapper.h	4.65 KB	-rw-r--r--	2023-11-28 08:52
__clang_hip_stdlib.h	1.19 KB	-rw-r--r--	2023-11-28 08:52
__stddef_max_align_t.h	857 B	-rw-r--r--	2023-11-28 08:52
__wmmintrin_aes.h	5.15 KB	-rw-r--r--	2023-11-28 08:52
__wmmintrin_pclmul.h	1.99 KB	-rw-r--r--	2023-11-28 08:52
adxintrin.h	7.37 KB	-rw-r--r--	2023-11-28 08:52
altivec.h	697.32 KB	-rw-r--r--	2023-11-28 08:52
ammintrin.h	7.54 KB	-rw-r--r--	2023-11-28 08:52
amxcomplexintrin.h	6.81 KB	-rw-r--r--	2023-11-28 08:52
amxfp16intrin.h	1.82 KB	-rw-r--r--	2023-11-28 08:52
amxintrin.h	21.12 KB	-rw-r--r--	2023-11-28 08:52
arm64intr.h	993 B	-rw-r--r--	2023-11-28 08:52
arm_acle.h	25.66 KB	-rw-r--r--	2023-11-28 08:52
arm_bf16.h	548 B	-rw-r--r--	2024-11-06 08:03
arm_cde.h	32.67 KB	-rw-r--r--	2024-11-06 08:03
arm_cmse.h	6.21 KB	-rw-r--r--	2023-11-28 08:52
arm_fp16.h	16.92 KB	-rw-r--r--	2024-11-06 08:03
arm_mve.h	1.48 MB	-rw-r--r--	2024-11-06 08:03
arm_neon.h	2.45 MB	-rw-r--r--	2024-11-06 08:03
arm_neon_sve_bridge.h	9.48 KB	-rw-r--r--	2023-11-28 08:52
arm_sme_draft_spec_subject_to_change.h	60.2 KB	-rw-r--r--	2024-11-06 08:03
arm_sve.h	1.51 MB	-rw-r--r--	2024-11-06 08:03
armintr.h	843 B	-rw-r--r--	2023-11-28 08:52
avx2intrin.h	186.96 KB	-rw-r--r--	2023-11-28 08:52
avx512bf16intrin.h	10.51 KB	-rw-r--r--	2023-11-28 08:52
avx512bitalgintrin.h	2.41 KB	-rw-r--r--	2023-11-28 08:52
avx512bwintrin.h	75.33 KB	-rw-r--r--	2023-11-28 08:52
avx512cdintrin.h	4.12 KB	-rw-r--r--	2023-11-28 08:52
avx512dqintrin.h	58.75 KB	-rw-r--r--	2023-11-28 08:52
avx512erintrin.h	11.83 KB	-rw-r--r--	2023-11-28 08:52
avx512fintrin.h	382.64 KB	-rw-r--r--	2023-11-28 08:52
avx512fp16intrin.h	156.63 KB	-rw-r--r--	2023-11-28 08:52
avx512ifmaintrin.h	2.49 KB	-rw-r--r--	2023-11-28 08:52
avx512ifmavlintrin.h	4.31 KB	-rw-r--r--	2023-11-28 08:52
avx512pfintrin.h	4.53 KB	-rw-r--r--	2023-11-28 08:52
avx512vbmi2intrin.h	13.17 KB	-rw-r--r--	2023-11-28 08:52
avx512vbmiintrin.h	3.72 KB	-rw-r--r--	2023-11-28 08:52
avx512vbmivlintrin.h	6.94 KB	-rw-r--r--	2023-11-28 08:52
avx512vlbf16intrin.h	19.21 KB	-rw-r--r--	2023-11-28 08:52
avx512vlbitalgintrin.h	4.23 KB	-rw-r--r--	2023-11-28 08:52
avx512vlbwintrin.h	121.26 KB	-rw-r--r--	2023-11-28 08:52
avx512vlcdintrin.h	7.66 KB	-rw-r--r--	2023-11-28 08:52
avx512vldqintrin.h	46.41 KB	-rw-r--r--	2023-11-28 08:52
avx512vlfp16intrin.h	85.51 KB	-rw-r--r--	2023-11-28 08:52
avx512vlintrin.h	322.29 KB	-rw-r--r--	2023-11-28 08:52
avx512vlvbmi2intrin.h	25.72 KB	-rw-r--r--	2023-11-28 08:52
avx512vlvnniintrin.h	13.13 KB	-rw-r--r--	2023-11-28 08:52
avx512vlvp2intersectintrin.h	4.44 KB	-rw-r--r--	2023-11-28 08:52
avx512vnniintrin.h	4.21 KB	-rw-r--r--	2023-11-28 08:52
avx512vp2intersectintrin.h	2.9 KB	-rw-r--r--	2023-11-28 08:52
avx512vpopcntdqintrin.h	2 KB	-rw-r--r--	2023-11-28 08:52
avx512vpopcntdqvlintrin.h	3.31 KB	-rw-r--r--	2023-11-28 08:52
avxifmaintrin.h	5.75 KB	-rw-r--r--	2023-11-28 08:52
avxintrin.h	195.41 KB	-rw-r--r--	2023-11-28 08:52
avxneconvertintrin.h	14.09 KB	-rw-r--r--	2023-11-28 08:52
avxvnniint16intrin.h	17.41 KB	-rw-r--r--	2023-11-28 08:52
avxvnniint8intrin.h	18.67 KB	-rw-r--r--	2023-11-28 08:52
avxvnniintrin.h	10.44 KB	-rw-r--r--	2023-11-28 08:52
bmi2intrin.h	7.09 KB	-rw-r--r--	2023-11-28 08:52
bmiintrin.h	14.12 KB	-rw-r--r--	2023-11-28 08:52
builtins.h	741 B	-rw-r--r--	2023-11-28 08:52
cet.h	1.49 KB	-rw-r--r--	2023-11-28 08:52
cetintrin.h	3.27 KB	-rw-r--r--	2023-11-28 08:52
cldemoteintrin.h	1.18 KB	-rw-r--r--	2023-11-28 08:52
clflushoptintrin.h	1.17 KB	-rw-r--r--	2023-11-28 08:52
clwbintrin.h	1.2 KB	-rw-r--r--	2023-11-28 08:52
clzerointrin.h	1.19 KB	-rw-r--r--	2023-11-28 08:52
cmpccxaddintrin.h	2.33 KB	-rw-r--r--	2023-11-28 08:52
cpuid.h	11.01 KB	-rw-r--r--	2023-11-28 08:52
crc32intrin.h	3.27 KB	-rw-r--r--	2023-11-28 08:52
emmintrin.h	192.64 KB	-rw-r--r--	2023-11-28 08:52
enqcmdintrin.h	2.12 KB	-rw-r--r--	2023-11-28 08:52
f16cintrin.h	5.39 KB	-rw-r--r--	2023-11-28 08:52
float.h	5.63 KB	-rw-r--r--	2023-11-28 08:52
fma4intrin.h	6.82 KB	-rw-r--r--	2023-11-28 08:52
fmaintrin.h	28.4 KB	-rw-r--r--	2023-11-28 08:52
fxsrintrin.h	2.82 KB	-rw-r--r--	2023-11-28 08:52
gfniintrin.h	7.57 KB	-rw-r--r--	2023-11-28 08:52
hexagon_circ_brev_intrinsics.h	15.59 KB	-rw-r--r--	2023-11-28 08:52
hexagon_protos.h	374.42 KB	-rw-r--r--	2023-11-28 08:52
hexagon_types.h	130.33 KB	-rw-r--r--	2023-11-28 08:52
hresetintrin.h	1.36 KB	-rw-r--r--	2023-11-28 08:52
htmintrin.h	6.14 KB	-rw-r--r--	2023-11-28 08:52
htmxlintrin.h	9.01 KB	-rw-r--r--	2023-11-28 08:52
hvx_hexagon_protos.h	254.26 KB	-rw-r--r--	2023-11-28 08:52
ia32intrin.h	12.72 KB	-rw-r--r--	2023-11-28 08:52
immintrin.h	23.57 KB	-rw-r--r--	2023-11-28 08:52
intrin.h	28.22 KB	-rw-r--r--	2023-11-28 08:52
inttypes.h	2.26 KB	-rw-r--r--	2023-11-28 08:52
invpcidintrin.h	764 B	-rw-r--r--	2023-11-28 08:52
iso646.h	656 B	-rw-r--r--	2023-11-28 08:52
keylockerintrin.h	17.98 KB	-rw-r--r--	2023-11-28 08:52
larchintrin.h	7.8 KB	-rw-r--r--	2023-11-28 08:52
limits.h	3.61 KB	-rw-r--r--	2023-11-28 08:52
lwpintrin.h	5 KB	-rw-r--r--	2023-11-28 08:52
lzcntintrin.h	3.18 KB	-rw-r--r--	2023-11-28 08:52
mm3dnow.h	4.5 KB	-rw-r--r--	2023-11-28 08:52
mm_malloc.h	1.88 KB	-rw-r--r--	2023-11-28 08:52
mmintrin.h	55.98 KB	-rw-r--r--	2023-11-28 08:52
module.modulemap	3.33 KB	-rw-r--r--	2023-11-28 08:52
movdirintrin.h	1.57 KB	-rw-r--r--	2023-11-28 08:52
msa.h	25.01 KB	-rw-r--r--	2023-11-28 08:52
mwaitxintrin.h	2.19 KB	-rw-r--r--	2023-11-28 08:52
nmmintrin.h	709 B	-rw-r--r--	2023-11-28 08:52
opencl-c-base.h	30.38 KB	-rw-r--r--	2023-11-28 08:52
opencl-c.h	874.39 KB	-rw-r--r--	2023-11-28 08:52
pconfigintrin.h	1.19 KB	-rw-r--r--	2023-11-28 08:52
pkuintrin.h	934 B	-rw-r--r--	2023-11-28 08:52
pmmintrin.h	10.5 KB	-rw-r--r--	2023-11-28 08:52
popcntintrin.h	1.82 KB	-rw-r--r--	2023-11-28 08:52
prfchiintrin.h	2.02 KB	-rw-r--r--	2023-11-28 08:52
prfchwintrin.h	2.06 KB	-rw-r--r--	2023-11-28 08:52
ptwriteintrin.h	1.05 KB	-rw-r--r--	2023-11-28 08:52
raointintrin.h	6.59 KB	-rw-r--r--	2023-11-28 08:52
rdpruintrin.h	1.59 KB	-rw-r--r--	2023-11-28 08:52
rdseedintrin.h	2.85 KB	-rw-r--r--	2023-11-28 08:52
riscv_ntlh.h	855 B	-rw-r--r--	2023-11-28 08:52
rtmintrin.h	1.25 KB	-rw-r--r--	2023-11-28 08:52
s390intrin.h	604 B	-rw-r--r--	2023-11-28 08:52
serializeintrin.h	881 B	-rw-r--r--	2023-11-28 08:52
sgxintrin.h	1.77 KB	-rw-r--r--	2023-11-28 08:52
sha512intrin.h	5.95 KB	-rw-r--r--	2023-11-28 08:52
shaintrin.h	7.37 KB	-rw-r--r--	2023-11-28 08:52
sifive_vector.h	522 B	-rw-r--r--	2023-11-28 08:52
sm3intrin.h	7.29 KB	-rw-r--r--	2023-11-28 08:52
sm4intrin.h	8.2 KB	-rw-r--r--	2023-11-28 08:52
smmintrin.h	99.32 KB	-rw-r--r--	2023-11-28 08:52
stdalign.h	911 B	-rw-r--r--	2023-11-28 08:52
stdarg.h	1.66 KB	-rw-r--r--	2023-11-28 08:52
stdatomic.h	8.3 KB	-rw-r--r--	2023-11-28 08:52
stdbool.h	1.04 KB	-rw-r--r--	2023-11-28 08:52
stddef.h	4.16 KB	-rw-r--r--	2023-11-28 08:52
stdint.h	32.49 KB	-rw-r--r--	2023-11-28 08:52
stdnoreturn.h	1.17 KB	-rw-r--r--	2023-11-28 08:52
tbmintrin.h	3.15 KB	-rw-r--r--	2023-11-28 08:52
tgmath.h	29.68 KB	-rw-r--r--	2023-11-28 08:52
tmmintrin.h	29.51 KB	-rw-r--r--	2023-11-28 08:52
tsxldtrkintrin.h	1.97 KB	-rw-r--r--	2023-11-28 08:52
uintrintrin.h	4.96 KB	-rw-r--r--	2023-11-28 08:52
unwind.h	11.21 KB	-rw-r--r--	2023-11-28 08:52
vadefs.h	1.39 KB	-rw-r--r--	2023-11-28 08:52
vaesintrin.h	2.46 KB	-rw-r--r--	2023-11-28 08:52
varargs.h	477 B	-rw-r--r--	2023-11-28 08:52
vecintrin.h	360.82 KB	-rw-r--r--	2023-11-28 08:52
velintrin.h	2.1 KB	-rw-r--r--	2023-11-28 08:52
velintrin_approx.h	3.54 KB	-rw-r--r--	2023-11-28 08:52
velintrin_gen.h	69.06 KB	-rw-r--r--	2023-11-28 08:52
vpclmulqdqintrin.h	1.06 KB	-rw-r--r--	2023-11-28 08:52
waitpkgintrin.h	1.33 KB	-rw-r--r--	2023-11-28 08:52
wasm_simd128.h	76.25 KB	-rw-r--r--	2023-11-28 08:52
wbnoinvdintrin.h	749 B	-rw-r--r--	2023-11-28 08:52
wmmintrin.h	659 B	-rw-r--r--	2023-11-28 08:52
x86gprintrin.h	2.32 KB	-rw-r--r--	2023-11-28 08:52
x86intrin.h	1.81 KB	-rw-r--r--	2023-11-28 08:52
xmmintrin.h	106.73 KB	-rw-r--r--	2023-11-28 08:52
xopintrin.h	19.96 KB	-rw-r--r--	2023-11-28 08:52
xsavecintrin.h	2.51 KB	-rw-r--r--	2023-11-28 08:52
xsaveintrin.h	1.64 KB	-rw-r--r--	2023-11-28 08:52
xsaveoptintrin.h	1 KB	-rw-r--r--	2023-11-28 08:52
xsavesintrin.h	1.24 KB	-rw-r--r--	2023-11-28 08:52
xtestintrin.h	873 B	-rw-r--r--	2023-11-28 08:52

Rename

/*===---- ammintrin.h - SSE4a intrinsics -----------------------------------===
 *
 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 * See https://llvm.org/LICENSE.txt for license information.
 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 *
 *===-----------------------------------------------------------------------===
 */

#ifndef __AMMINTRIN_H
#define __AMMINTRIN_H

#if !defined(__i386__) && !defined(__x86_64__)
#error "This header is only meant to be used on x86 and x64 architecture"
#endif

#include <pmmintrin.h>

/* Define the default attributes for the functions in this file. */
#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("sse4a"), __min_vector_width__(128)))

/// Extracts the specified bits from the lower 64 bits of the 128-bit
///    integer vector operand at the index \a idx and of the length \a len.
///
/// \headerfile <x86intrin.h>
///
/// \code
/// __m128i _mm_extracti_si64(__m128i x, const int len, const int idx);
/// \endcode
///
/// This intrinsic corresponds to the <c> EXTRQ </c> instruction.
///
/// \param x
///    The value from which bits are extracted.
/// \param len
///    Bits [5:0] specify the length; the other bits are ignored. If bits [5:0]
///    are zero, the length is interpreted as 64.
/// \param idx
///    Bits [5:0] specify the index of the least significant bit; the other
///    bits are ignored. If the sum of the index and length is greater than 64,
///    the result is undefined. If the length and index are both zero, bits
///    [63:0] of parameter \a x are extracted. If the length is zero but the
///    index is non-zero, the result is undefined.
/// \returns A 128-bit integer vector whose lower 64 bits contain the bits
///    extracted from the source operand.
#define _mm_extracti_si64(x, len, idx) \
  ((__m128i)__builtin_ia32_extrqi((__v2di)(__m128i)(x), \
                                  (char)(len), (char)(idx)))

/// Extracts the specified bits from the lower 64 bits of the 128-bit
///    integer vector operand at the index and of the length specified by
///    \a __y.
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the <c> EXTRQ </c> instruction.
///
/// \param __x
///    The value from which bits are extracted.
/// \param __y
///    Specifies the index of the least significant bit at [13:8] and the
///    length at [5:0]; all other bits are ignored. If bits [5:0] are zero, the
///    length is interpreted as 64. If the sum of the index and length is
///    greater than 64, the result is undefined. If the length and index are
///    both zero, bits [63:0] of parameter \a __x are extracted. If the length
///    is zero but the index is non-zero, the result is undefined.
/// \returns A 128-bit vector whose lower 64 bits contain the bits extracted
///    from the source operand.
static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_extract_si64(__m128i __x, __m128i __y)
{
  return (__m128i)__builtin_ia32_extrq((__v2di)__x, (__v16qi)__y);
}

/// Inserts bits of a specified length from the source integer vector
///    \a y into the lower 64 bits of the destination integer vector \a x at
///    the index \a idx and of the length \a len.
///
/// \headerfile <x86intrin.h>
///
/// \code
/// __m128i _mm_inserti_si64(__m128i x, __m128i y, const int len,
/// const int idx);
/// \endcode
///
/// This intrinsic corresponds to the <c> INSERTQ </c> instruction.
///
/// \param x
///    The destination operand where bits will be inserted. The inserted bits
///    are defined by the length \a len and by the index \a idx specifying the
///    least significant bit.
/// \param y
///    The source operand containing the bits to be extracted. The extracted
///    bits are the least significant bits of operand \a y of length \a len.
/// \param len
///    Bits [5:0] specify the length; the other bits are ignored. If bits [5:0]
///    are zero, the length is interpreted as 64.
/// \param idx
///    Bits [5:0] specify the index of the least significant bit; the other
///    bits are ignored. If the sum of the index and length is greater than 64,
///    the result is undefined. If the length and index are both zero, bits
///    [63:0] of parameter \a y are inserted into parameter \a x. If the length
///    is zero but the index is non-zero, the result is undefined.
/// \returns A 128-bit integer vector containing the original lower 64-bits of
///    destination operand \a x with the specified bitfields replaced by the
///    lower bits of source operand \a y. The upper 64 bits of the return value
///    are undefined.
#define _mm_inserti_si64(x, y, len, idx) \
  ((__m128i)__builtin_ia32_insertqi((__v2di)(__m128i)(x), \
                                    (__v2di)(__m128i)(y), \
                                    (char)(len), (char)(idx)))

/// Inserts bits of a specified length from the source integer vector
///    \a __y into the lower 64 bits of the destination integer vector \a __x
///    at the index and of the length specified by \a __y.
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the <c> INSERTQ </c> instruction.
///
/// \param __x
///    The destination operand where bits will be inserted. The inserted bits
///    are defined by the length and by the index of the least significant bit
///    specified by operand \a __y.
/// \param __y
///    The source operand containing the bits to be extracted. The extracted
///    bits are the least significant bits of operand \a __y with length
///    specified by bits [69:64]. These are inserted into the destination at the
///    index specified by bits [77:72]; all other bits are ignored. If bits
///    [69:64] are zero, the length is interpreted as 64. If the sum of the
///    index and length is greater than 64, the result is undefined. If the
///    length and index are both zero, bits [63:0] of parameter \a __y are
///    inserted into parameter \a __x. If the length is zero but the index is
///    non-zero, the result is undefined.
/// \returns A 128-bit integer vector containing the original lower 64-bits of
///    destination operand \a __x with the specified bitfields replaced by the
///    lower bits of source operand \a __y. The upper 64 bits of the return
///    value are undefined.
static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_insert_si64(__m128i __x, __m128i __y)
{
  return (__m128i)__builtin_ia32_insertq((__v2di)__x, (__v2di)__y);
}

/// Stores a 64-bit double-precision value in a 64-bit memory location.
///    To minimize caching, the data is flagged as non-temporal (unlikely to be
///    used again soon).
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the <c> MOVNTSD </c> instruction.
///
/// \param __p
///    The 64-bit memory location used to store the register value.
/// \param __a
///    The 64-bit double-precision floating-point register value to be stored.
static __inline__ void __DEFAULT_FN_ATTRS
_mm_stream_sd(double *__p, __m128d __a)
{
  __builtin_ia32_movntsd(__p, (__v2df)__a);
}

/// Stores a 32-bit single-precision floating-point value in a 32-bit
///    memory location. To minimize caching, the data is flagged as
///    non-temporal (unlikely to be used again soon).
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the <c> MOVNTSS </c> instruction.
///
/// \param __p
///    The 32-bit memory location used to store the register value.
/// \param __a
///    The 32-bit single-precision floating-point register value to be stored.
static __inline__ void __DEFAULT_FN_ATTRS
_mm_stream_ss(float *__p, __m128 __a)
{
  __builtin_ia32_movntss(__p, (__v4sf)__a);
}

#undef __DEFAULT_FN_ATTRS

#endif /* __AMMINTRIN_H */