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Name	Size	Permission	Date
cuda_wrappers	[ DIR ]	drwxr-xr-x	2025-06-02 12:56
llvm_libc_wrappers	[ DIR ]	drwxr-xr-x	2025-06-02 12:56
openmp_wrappers	[ DIR ]	drwxr-xr-x	2025-06-02 12:56
ppc_wrappers	[ DIR ]	drwxr-xr-x	2025-06-02 12:56
__clang_cuda_builtin_vars.h	4.78 KB	-rw-r--r--	2023-11-28 08:52
__clang_cuda_cmath.h	18.06 KB	-rw-r--r--	2023-11-28 08:52
__clang_cuda_complex_builtins.h	9.36 KB	-rw-r--r--	2023-11-28 08:52
__clang_cuda_device_functions.h	56.68 KB	-rw-r--r--	2023-11-28 08:52
__clang_cuda_intrinsics.h	29.93 KB	-rw-r--r--	2023-11-28 08:52
__clang_cuda_libdevice_declares.h	21.87 KB	-rw-r--r--	2023-11-28 08:52
__clang_cuda_math.h	15.99 KB	-rw-r--r--	2023-11-28 08:52
__clang_cuda_math_forward_declares.h	8.27 KB	-rw-r--r--	2023-11-28 08:52
__clang_cuda_runtime_wrapper.h	17.61 KB	-rw-r--r--	2023-11-28 08:52
__clang_cuda_texture_intrinsics.h	31.86 KB	-rw-r--r--	2023-11-28 08:52
__clang_hip_cmath.h	26.34 KB	-rw-r--r--	2023-11-28 08:52
__clang_hip_libdevice_declares.h	19.87 KB	-rw-r--r--	2023-11-28 08:52
__clang_hip_math.h	31.96 KB	-rw-r--r--	2023-11-28 08:52
__clang_hip_runtime_wrapper.h	4.65 KB	-rw-r--r--	2023-11-28 08:52
__clang_hip_stdlib.h	1.19 KB	-rw-r--r--	2023-11-28 08:52
__stddef_max_align_t.h	857 B	-rw-r--r--	2023-11-28 08:52
__wmmintrin_aes.h	5.15 KB	-rw-r--r--	2023-11-28 08:52
__wmmintrin_pclmul.h	1.99 KB	-rw-r--r--	2023-11-28 08:52
adxintrin.h	7.37 KB	-rw-r--r--	2023-11-28 08:52
altivec.h	697.32 KB	-rw-r--r--	2023-11-28 08:52
ammintrin.h	7.54 KB	-rw-r--r--	2023-11-28 08:52
amxcomplexintrin.h	6.81 KB	-rw-r--r--	2023-11-28 08:52
amxfp16intrin.h	1.82 KB	-rw-r--r--	2023-11-28 08:52
amxintrin.h	21.12 KB	-rw-r--r--	2023-11-28 08:52
arm64intr.h	993 B	-rw-r--r--	2023-11-28 08:52
arm_acle.h	25.66 KB	-rw-r--r--	2023-11-28 08:52
arm_bf16.h	548 B	-rw-r--r--	2024-11-06 08:03
arm_cde.h	32.67 KB	-rw-r--r--	2024-11-06 08:03
arm_cmse.h	6.21 KB	-rw-r--r--	2023-11-28 08:52
arm_fp16.h	16.92 KB	-rw-r--r--	2024-11-06 08:03
arm_mve.h	1.48 MB	-rw-r--r--	2024-11-06 08:03
arm_neon.h	2.45 MB	-rw-r--r--	2024-11-06 08:03
arm_neon_sve_bridge.h	9.48 KB	-rw-r--r--	2023-11-28 08:52
arm_sme_draft_spec_subject_to_change.h	60.2 KB	-rw-r--r--	2024-11-06 08:03
arm_sve.h	1.51 MB	-rw-r--r--	2024-11-06 08:03
armintr.h	843 B	-rw-r--r--	2023-11-28 08:52
avx2intrin.h	186.96 KB	-rw-r--r--	2023-11-28 08:52
avx512bf16intrin.h	10.51 KB	-rw-r--r--	2023-11-28 08:52
avx512bitalgintrin.h	2.41 KB	-rw-r--r--	2023-11-28 08:52
avx512bwintrin.h	75.33 KB	-rw-r--r--	2023-11-28 08:52
avx512cdintrin.h	4.12 KB	-rw-r--r--	2023-11-28 08:52
avx512dqintrin.h	58.75 KB	-rw-r--r--	2023-11-28 08:52
avx512erintrin.h	11.83 KB	-rw-r--r--	2023-11-28 08:52
avx512fintrin.h	382.64 KB	-rw-r--r--	2023-11-28 08:52
avx512fp16intrin.h	156.63 KB	-rw-r--r--	2023-11-28 08:52
avx512ifmaintrin.h	2.49 KB	-rw-r--r--	2023-11-28 08:52
avx512ifmavlintrin.h	4.31 KB	-rw-r--r--	2023-11-28 08:52
avx512pfintrin.h	4.53 KB	-rw-r--r--	2023-11-28 08:52
avx512vbmi2intrin.h	13.17 KB	-rw-r--r--	2023-11-28 08:52
avx512vbmiintrin.h	3.72 KB	-rw-r--r--	2023-11-28 08:52
avx512vbmivlintrin.h	6.94 KB	-rw-r--r--	2023-11-28 08:52
avx512vlbf16intrin.h	19.21 KB	-rw-r--r--	2023-11-28 08:52
avx512vlbitalgintrin.h	4.23 KB	-rw-r--r--	2023-11-28 08:52
avx512vlbwintrin.h	121.26 KB	-rw-r--r--	2023-11-28 08:52
avx512vlcdintrin.h	7.66 KB	-rw-r--r--	2023-11-28 08:52
avx512vldqintrin.h	46.41 KB	-rw-r--r--	2023-11-28 08:52
avx512vlfp16intrin.h	85.51 KB	-rw-r--r--	2023-11-28 08:52
avx512vlintrin.h	322.29 KB	-rw-r--r--	2023-11-28 08:52
avx512vlvbmi2intrin.h	25.72 KB	-rw-r--r--	2023-11-28 08:52
avx512vlvnniintrin.h	13.13 KB	-rw-r--r--	2023-11-28 08:52
avx512vlvp2intersectintrin.h	4.44 KB	-rw-r--r--	2023-11-28 08:52
avx512vnniintrin.h	4.21 KB	-rw-r--r--	2023-11-28 08:52
avx512vp2intersectintrin.h	2.9 KB	-rw-r--r--	2023-11-28 08:52
avx512vpopcntdqintrin.h	2 KB	-rw-r--r--	2023-11-28 08:52
avx512vpopcntdqvlintrin.h	3.31 KB	-rw-r--r--	2023-11-28 08:52
avxifmaintrin.h	5.75 KB	-rw-r--r--	2023-11-28 08:52
avxintrin.h	195.41 KB	-rw-r--r--	2023-11-28 08:52
avxneconvertintrin.h	14.09 KB	-rw-r--r--	2023-11-28 08:52
avxvnniint16intrin.h	17.41 KB	-rw-r--r--	2023-11-28 08:52
avxvnniint8intrin.h	18.67 KB	-rw-r--r--	2023-11-28 08:52
avxvnniintrin.h	10.44 KB	-rw-r--r--	2023-11-28 08:52
bmi2intrin.h	7.09 KB	-rw-r--r--	2023-11-28 08:52
bmiintrin.h	14.12 KB	-rw-r--r--	2023-11-28 08:52
builtins.h	741 B	-rw-r--r--	2023-11-28 08:52
cet.h	1.49 KB	-rw-r--r--	2023-11-28 08:52
cetintrin.h	3.27 KB	-rw-r--r--	2023-11-28 08:52
cldemoteintrin.h	1.18 KB	-rw-r--r--	2023-11-28 08:52
clflushoptintrin.h	1.17 KB	-rw-r--r--	2023-11-28 08:52
clwbintrin.h	1.2 KB	-rw-r--r--	2023-11-28 08:52
clzerointrin.h	1.19 KB	-rw-r--r--	2023-11-28 08:52
cmpccxaddintrin.h	2.33 KB	-rw-r--r--	2023-11-28 08:52
cpuid.h	11.01 KB	-rw-r--r--	2023-11-28 08:52
crc32intrin.h	3.27 KB	-rw-r--r--	2023-11-28 08:52
emmintrin.h	192.64 KB	-rw-r--r--	2023-11-28 08:52
enqcmdintrin.h	2.12 KB	-rw-r--r--	2023-11-28 08:52
f16cintrin.h	5.39 KB	-rw-r--r--	2023-11-28 08:52
float.h	5.63 KB	-rw-r--r--	2023-11-28 08:52
fma4intrin.h	6.82 KB	-rw-r--r--	2023-11-28 08:52
fmaintrin.h	28.4 KB	-rw-r--r--	2023-11-28 08:52
fxsrintrin.h	2.82 KB	-rw-r--r--	2023-11-28 08:52
gfniintrin.h	7.57 KB	-rw-r--r--	2023-11-28 08:52
hexagon_circ_brev_intrinsics.h	15.59 KB	-rw-r--r--	2023-11-28 08:52
hexagon_protos.h	374.42 KB	-rw-r--r--	2023-11-28 08:52
hexagon_types.h	130.33 KB	-rw-r--r--	2023-11-28 08:52
hresetintrin.h	1.36 KB	-rw-r--r--	2023-11-28 08:52
htmintrin.h	6.14 KB	-rw-r--r--	2023-11-28 08:52
htmxlintrin.h	9.01 KB	-rw-r--r--	2023-11-28 08:52
hvx_hexagon_protos.h	254.26 KB	-rw-r--r--	2023-11-28 08:52
ia32intrin.h	12.72 KB	-rw-r--r--	2023-11-28 08:52
immintrin.h	23.57 KB	-rw-r--r--	2023-11-28 08:52
intrin.h	28.22 KB	-rw-r--r--	2023-11-28 08:52
inttypes.h	2.26 KB	-rw-r--r--	2023-11-28 08:52
invpcidintrin.h	764 B	-rw-r--r--	2023-11-28 08:52
iso646.h	656 B	-rw-r--r--	2023-11-28 08:52
keylockerintrin.h	17.98 KB	-rw-r--r--	2023-11-28 08:52
larchintrin.h	7.8 KB	-rw-r--r--	2023-11-28 08:52
limits.h	3.61 KB	-rw-r--r--	2023-11-28 08:52
lwpintrin.h	5 KB	-rw-r--r--	2023-11-28 08:52
lzcntintrin.h	3.18 KB	-rw-r--r--	2023-11-28 08:52
mm3dnow.h	4.5 KB	-rw-r--r--	2023-11-28 08:52
mm_malloc.h	1.88 KB	-rw-r--r--	2023-11-28 08:52
mmintrin.h	55.98 KB	-rw-r--r--	2023-11-28 08:52
module.modulemap	3.33 KB	-rw-r--r--	2023-11-28 08:52
movdirintrin.h	1.57 KB	-rw-r--r--	2023-11-28 08:52
msa.h	25.01 KB	-rw-r--r--	2023-11-28 08:52
mwaitxintrin.h	2.19 KB	-rw-r--r--	2023-11-28 08:52
nmmintrin.h	709 B	-rw-r--r--	2023-11-28 08:52
opencl-c-base.h	30.38 KB	-rw-r--r--	2023-11-28 08:52
opencl-c.h	874.39 KB	-rw-r--r--	2023-11-28 08:52
pconfigintrin.h	1.19 KB	-rw-r--r--	2023-11-28 08:52
pkuintrin.h	934 B	-rw-r--r--	2023-11-28 08:52
pmmintrin.h	10.5 KB	-rw-r--r--	2023-11-28 08:52
popcntintrin.h	1.82 KB	-rw-r--r--	2023-11-28 08:52
prfchiintrin.h	2.02 KB	-rw-r--r--	2023-11-28 08:52
prfchwintrin.h	2.06 KB	-rw-r--r--	2023-11-28 08:52
ptwriteintrin.h	1.05 KB	-rw-r--r--	2023-11-28 08:52
raointintrin.h	6.59 KB	-rw-r--r--	2023-11-28 08:52
rdpruintrin.h	1.59 KB	-rw-r--r--	2023-11-28 08:52
rdseedintrin.h	2.85 KB	-rw-r--r--	2023-11-28 08:52
riscv_ntlh.h	855 B	-rw-r--r--	2023-11-28 08:52
rtmintrin.h	1.25 KB	-rw-r--r--	2023-11-28 08:52
s390intrin.h	604 B	-rw-r--r--	2023-11-28 08:52
serializeintrin.h	881 B	-rw-r--r--	2023-11-28 08:52
sgxintrin.h	1.77 KB	-rw-r--r--	2023-11-28 08:52
sha512intrin.h	5.95 KB	-rw-r--r--	2023-11-28 08:52
shaintrin.h	7.37 KB	-rw-r--r--	2023-11-28 08:52
sifive_vector.h	522 B	-rw-r--r--	2023-11-28 08:52
sm3intrin.h	7.29 KB	-rw-r--r--	2023-11-28 08:52
sm4intrin.h	8.2 KB	-rw-r--r--	2023-11-28 08:52
smmintrin.h	99.32 KB	-rw-r--r--	2023-11-28 08:52
stdalign.h	911 B	-rw-r--r--	2023-11-28 08:52
stdarg.h	1.66 KB	-rw-r--r--	2023-11-28 08:52
stdatomic.h	8.3 KB	-rw-r--r--	2023-11-28 08:52
stdbool.h	1.04 KB	-rw-r--r--	2023-11-28 08:52
stddef.h	4.16 KB	-rw-r--r--	2023-11-28 08:52
stdint.h	32.49 KB	-rw-r--r--	2023-11-28 08:52
stdnoreturn.h	1.17 KB	-rw-r--r--	2023-11-28 08:52
tbmintrin.h	3.15 KB	-rw-r--r--	2023-11-28 08:52
tgmath.h	29.68 KB	-rw-r--r--	2023-11-28 08:52
tmmintrin.h	29.51 KB	-rw-r--r--	2023-11-28 08:52
tsxldtrkintrin.h	1.97 KB	-rw-r--r--	2023-11-28 08:52
uintrintrin.h	4.96 KB	-rw-r--r--	2023-11-28 08:52
unwind.h	11.21 KB	-rw-r--r--	2023-11-28 08:52
vadefs.h	1.39 KB	-rw-r--r--	2023-11-28 08:52
vaesintrin.h	2.46 KB	-rw-r--r--	2023-11-28 08:52
varargs.h	477 B	-rw-r--r--	2023-11-28 08:52
vecintrin.h	360.82 KB	-rw-r--r--	2023-11-28 08:52
velintrin.h	2.1 KB	-rw-r--r--	2023-11-28 08:52
velintrin_approx.h	3.54 KB	-rw-r--r--	2023-11-28 08:52
velintrin_gen.h	69.06 KB	-rw-r--r--	2023-11-28 08:52
vpclmulqdqintrin.h	1.06 KB	-rw-r--r--	2023-11-28 08:52
waitpkgintrin.h	1.33 KB	-rw-r--r--	2023-11-28 08:52
wasm_simd128.h	76.25 KB	-rw-r--r--	2023-11-28 08:52
wbnoinvdintrin.h	749 B	-rw-r--r--	2023-11-28 08:52
wmmintrin.h	659 B	-rw-r--r--	2023-11-28 08:52
x86gprintrin.h	2.32 KB	-rw-r--r--	2023-11-28 08:52
x86intrin.h	1.81 KB	-rw-r--r--	2023-11-28 08:52
xmmintrin.h	106.73 KB	-rw-r--r--	2023-11-28 08:52
xopintrin.h	19.96 KB	-rw-r--r--	2023-11-28 08:52
xsavecintrin.h	2.51 KB	-rw-r--r--	2023-11-28 08:52
xsaveintrin.h	1.64 KB	-rw-r--r--	2023-11-28 08:52
xsaveoptintrin.h	1 KB	-rw-r--r--	2023-11-28 08:52
xsavesintrin.h	1.24 KB	-rw-r--r--	2023-11-28 08:52
xtestintrin.h	873 B	-rw-r--r--	2023-11-28 08:52

Rename

/* ===-------- ia32intrin.h ---------------------------------------------------===
 *
 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 * See https://llvm.org/LICENSE.txt for license information.
 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 *
 *===-----------------------------------------------------------------------===
 */

#ifndef __X86INTRIN_H
#error "Never use <ia32intrin.h> directly; include <x86intrin.h> instead."
#endif

#ifndef __IA32INTRIN_H
#define __IA32INTRIN_H

/* Define the default attributes for the functions in this file. */
#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
#define __DEFAULT_FN_ATTRS_CRC32 __attribute__((__always_inline__, __nodebug__, __target__("crc32")))

#if defined(__cplusplus) && (__cplusplus >= 201103L)
#define __DEFAULT_FN_ATTRS_CAST __attribute__((__always_inline__)) constexpr
#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS constexpr
#else
#define __DEFAULT_FN_ATTRS_CAST __attribute__((__always_inline__))
#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS
#endif

/** Find the first set bit starting from the lsb. Result is undefined if
 *  input is 0.
 *
 *  \headerfile <x86intrin.h>
 *
 *  This intrinsic corresponds to the <c> BSF </c> instruction or the
 *  <c> TZCNT </c> instruction.
 *
 *  \param __A
 *     A 32-bit integer operand.
 *  \returns A 32-bit integer containing the bit number.
 */
static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR
__bsfd(int __A) {
  return __builtin_ctz((unsigned int)__A);
}

/** Find the first set bit starting from the msb. Result is undefined if
 *  input is 0.
 *
 *  \headerfile <x86intrin.h>
 *
 *  This intrinsic corresponds to the <c> BSR </c> instruction or the
 *  <c> LZCNT </c> instruction and an <c> XOR </c>.
 *
 *  \param __A
 *     A 32-bit integer operand.
 *  \returns A 32-bit integer containing the bit number.
 */
static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR
__bsrd(int __A) {
  return 31 - __builtin_clz((unsigned int)__A);
}

/** Swaps the bytes in the input. Converting little endian to big endian or
 *  vice versa.
 *
 *  \headerfile <x86intrin.h>
 *
 *  This intrinsic corresponds to the <c> BSWAP </c> instruction.
 *
 *  \param __A
 *     A 32-bit integer operand.
 *  \returns A 32-bit integer containing the swapped bytes.
 */
static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR
__bswapd(int __A) {
  return (int)__builtin_bswap32((unsigned int)__A);
}

static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR
_bswap(int __A) {
  return (int)__builtin_bswap32((unsigned int)__A);
}

#define _bit_scan_forward(A) __bsfd((A))
#define _bit_scan_reverse(A) __bsrd((A))

#ifdef __x86_64__
/** Find the first set bit starting from the lsb. Result is undefined if
 *  input is 0.
 *
 *  \headerfile <x86intrin.h>
 *
 *  This intrinsic corresponds to the <c> BSF </c> instruction or the
 *  <c> TZCNT </c> instruction.
 *
 *  \param __A
 *     A 64-bit integer operand.
 *  \returns A 32-bit integer containing the bit number.
 */
static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR
__bsfq(long long __A) {
  return (long long)__builtin_ctzll((unsigned long long)__A);
}

/** Find the first set bit starting from the msb. Result is undefined if
 *  input is 0.
 *
 *  \headerfile <x86intrin.h>
 *
 *  This intrinsic corresponds to the <c> BSR </c> instruction or the
 *  <c> LZCNT </c> instruction and an <c> XOR </c>.
 *
 *  \param __A
 *     A 64-bit integer operand.
 *  \returns A 32-bit integer containing the bit number.
 */
static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR
__bsrq(long long __A) {
  return 63 - __builtin_clzll((unsigned long long)__A);
}

/** Swaps the bytes in the input. Converting little endian to big endian or
 *  vice versa.
 *
 *  \headerfile <x86intrin.h>
 *
 *  This intrinsic corresponds to the <c> BSWAP </c> instruction.
 *
 *  \param __A
 *     A 64-bit integer operand.
 *  \returns A 64-bit integer containing the swapped bytes.
 */
static __inline__ long long __DEFAULT_FN_ATTRS_CONSTEXPR
__bswapq(long long __A) {
  return (long long)__builtin_bswap64((unsigned long long)__A);
}

#define _bswap64(A) __bswapq((A))
#endif

/** Counts the number of bits in the source operand having a value of 1.
 *
 *  \headerfile <x86intrin.h>
 *
 *  This intrinsic corresponds to the <c> POPCNT </c> instruction or a
 *  a sequence of arithmetic and logic ops to calculate it.
 *
 *  \param __A
 *     An unsigned 32-bit integer operand.
 *  \returns A 32-bit integer containing the number of bits with value 1 in the
 *     source operand.
 */
static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR
__popcntd(unsigned int __A)
{
  return __builtin_popcount(__A);
}

#define _popcnt32(A) __popcntd((A))

#ifdef __x86_64__
/** Counts the number of bits in the source operand having a value of 1.
 *
 *  \headerfile <x86intrin.h>
 *
 *  This intrinsic corresponds to the <c> POPCNT </c> instruction or a
 *  a sequence of arithmetic and logic ops to calculate it.
 *
 *  \param __A
 *     An unsigned 64-bit integer operand.
 *  \returns A 64-bit integer containing the number of bits with value 1 in the
 *     source operand.
 */
static __inline__ long long __DEFAULT_FN_ATTRS_CONSTEXPR
__popcntq(unsigned long long __A)
{
  return __builtin_popcountll(__A);
}

#define _popcnt64(A) __popcntq((A))
#endif /* __x86_64__ */

#ifdef __x86_64__
static __inline__ unsigned long long __DEFAULT_FN_ATTRS
__readeflags(void)
{
  return __builtin_ia32_readeflags_u64();
}

static __inline__ void __DEFAULT_FN_ATTRS
__writeeflags(unsigned long long __f)
{
  __builtin_ia32_writeeflags_u64(__f);
}

#else /* !__x86_64__ */
static __inline__ unsigned int __DEFAULT_FN_ATTRS
__readeflags(void)
{
  return __builtin_ia32_readeflags_u32();
}

static __inline__ void __DEFAULT_FN_ATTRS
__writeeflags(unsigned int __f)
{
  __builtin_ia32_writeeflags_u32(__f);
}
#endif /* !__x86_64__ */

/** Cast a 32-bit float value to a 32-bit unsigned integer value
 *
 *  \headerfile <x86intrin.h>
 *  This intrinsic corresponds to the <c> VMOVD / MOVD </c> instruction in x86_64,
 *  and corresponds to the <c> VMOVL / MOVL </c> instruction in ia32.
 *
 *  \param __A
 *     A 32-bit float value.
 *  \returns a 32-bit unsigned integer containing the converted value.
 */
static __inline__ unsigned int __DEFAULT_FN_ATTRS_CAST
_castf32_u32(float __A) {
  return __builtin_bit_cast(unsigned int, __A);
}

/** Cast a 64-bit float value to a 64-bit unsigned integer value
 *
 *  \headerfile <x86intrin.h>
 *  This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction in x86_64,
 *  and corresponds to the <c> VMOVL / MOVL </c> instruction in ia32.
 *
 *  \param __A
 *     A 64-bit float value.
 *  \returns a 64-bit unsigned integer containing the converted value.
 */
static __inline__ unsigned long long __DEFAULT_FN_ATTRS_CAST
_castf64_u64(double __A) {
  return __builtin_bit_cast(unsigned long long, __A);
}

/** Cast a 32-bit unsigned integer value to a 32-bit float value
 *
 *  \headerfile <x86intrin.h>
 *  This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction in x86_64,
 *  and corresponds to the <c> FLDS </c> instruction in ia32.
 *
 *  \param __A
 *     A 32-bit unsigned integer value.
 *  \returns a 32-bit float value containing the converted value.
 */
static __inline__ float __DEFAULT_FN_ATTRS_CAST
_castu32_f32(unsigned int __A) {
  return __builtin_bit_cast(float, __A);
}

/** Cast a 64-bit unsigned integer value to a 64-bit float value
 *
 *  \headerfile <x86intrin.h>
 *  This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction in x86_64,
 *  and corresponds to the <c> FLDL </c> instruction in ia32.
 *
 *  \param __A
 *     A 64-bit unsigned integer value.
 *  \returns a 64-bit float value containing the converted value.
 */
static __inline__ double __DEFAULT_FN_ATTRS_CAST
_castu64_f64(unsigned long long __A) {
  return __builtin_bit_cast(double, __A);
}

/** Adds the unsigned integer operand to the CRC-32C checksum of the
 *     unsigned char operand.
 *
 *  \headerfile <x86intrin.h>
 *
 *  This intrinsic corresponds to the <c> CRC32B </c> instruction.
 *
 *  \param __C
 *     An unsigned integer operand to add to the CRC-32C checksum of operand
 *     \a  __D.
 *  \param __D
 *     An unsigned 8-bit integer operand used to compute the CRC-32C checksum.
 *  \returns The result of adding operand \a __C to the CRC-32C checksum of
 *     operand \a __D.
 */
static __inline__ unsigned int __DEFAULT_FN_ATTRS_CRC32
__crc32b(unsigned int __C, unsigned char __D)
{
  return __builtin_ia32_crc32qi(__C, __D);
}

/** Adds the unsigned integer operand to the CRC-32C checksum of the
 *     unsigned short operand.
 *
 *  \headerfile <x86intrin.h>
 *
 *  This intrinsic corresponds to the <c> CRC32W </c> instruction.
 *
 *  \param __C
 *     An unsigned integer operand to add to the CRC-32C checksum of operand
 *     \a  __D.
 *  \param __D
 *     An unsigned 16-bit integer operand used to compute the CRC-32C checksum.
 *  \returns The result of adding operand \a __C to the CRC-32C checksum of
 *     operand \a __D.
 */
static __inline__ unsigned int __DEFAULT_FN_ATTRS_CRC32
__crc32w(unsigned int __C, unsigned short __D)
{
  return __builtin_ia32_crc32hi(__C, __D);
}

/** Adds the unsigned integer operand to the CRC-32C checksum of the
 *     second unsigned integer operand.
 *
 *  \headerfile <x86intrin.h>
 *
 *  This intrinsic corresponds to the <c> CRC32D </c> instruction.
 *
 *  \param __C
 *     An unsigned integer operand to add to the CRC-32C checksum of operand
 *     \a  __D.
 *  \param __D
 *     An unsigned 32-bit integer operand used to compute the CRC-32C checksum.
 *  \returns The result of adding operand \a __C to the CRC-32C checksum of
 *     operand \a __D.
 */
static __inline__ unsigned int __DEFAULT_FN_ATTRS_CRC32
__crc32d(unsigned int __C, unsigned int __D)
{
  return __builtin_ia32_crc32si(__C, __D);
}

#ifdef __x86_64__
/** Adds the unsigned integer operand to the CRC-32C checksum of the
 *     unsigned 64-bit integer operand.
 *
 *  \headerfile <x86intrin.h>
 *
 *  This intrinsic corresponds to the <c> CRC32Q </c> instruction.
 *
 *  \param __C
 *     An unsigned integer operand to add to the CRC-32C checksum of operand
 *     \a  __D.
 *  \param __D
 *     An unsigned 64-bit integer operand used to compute the CRC-32C checksum.
 *  \returns The result of adding operand \a __C to the CRC-32C checksum of
 *     operand \a __D.
 */
static __inline__ unsigned long long __DEFAULT_FN_ATTRS_CRC32
__crc32q(unsigned long long __C, unsigned long long __D)
{
  return __builtin_ia32_crc32di(__C, __D);
}
#endif /* __x86_64__ */

static __inline__ unsigned long long __DEFAULT_FN_ATTRS
__rdpmc(int __A) {
  return __builtin_ia32_rdpmc(__A);
}

/* __rdtscp */
static __inline__ unsigned long long __DEFAULT_FN_ATTRS
__rdtscp(unsigned int *__A) {
  return __builtin_ia32_rdtscp(__A);
}

#define _rdtsc() __rdtsc()

#define _rdpmc(A) __rdpmc(A)

static __inline__ void __DEFAULT_FN_ATTRS
_wbinvd(void) {
  __builtin_ia32_wbinvd();
}

static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR
__rolb(unsigned char __X, int __C) {
  return __builtin_rotateleft8(__X, __C);
}

static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR
__rorb(unsigned char __X, int __C) {
  return __builtin_rotateright8(__X, __C);
}

static __inline__ unsigned short __DEFAULT_FN_ATTRS_CONSTEXPR
__rolw(unsigned short __X, int __C) {
  return __builtin_rotateleft16(__X, __C);
}

static __inline__ unsigned short __DEFAULT_FN_ATTRS_CONSTEXPR
__rorw(unsigned short __X, int __C) {
  return __builtin_rotateright16(__X, __C);
}

static __inline__ unsigned int __DEFAULT_FN_ATTRS_CONSTEXPR
__rold(unsigned int __X, int __C) {
  return __builtin_rotateleft32(__X, (unsigned int)__C);
}

static __inline__ unsigned int __DEFAULT_FN_ATTRS_CONSTEXPR
__rord(unsigned int __X, int __C) {
  return __builtin_rotateright32(__X, (unsigned int)__C);
}

#ifdef __x86_64__
static __inline__ unsigned long long __DEFAULT_FN_ATTRS_CONSTEXPR
__rolq(unsigned long long __X, int __C) {
  return __builtin_rotateleft64(__X, (unsigned long long)__C);
}

static __inline__ unsigned long long __DEFAULT_FN_ATTRS_CONSTEXPR
__rorq(unsigned long long __X, int __C) {
  return __builtin_rotateright64(__X, (unsigned long long)__C);
}
#endif /* __x86_64__ */

#ifndef _MSC_VER
/* These are already provided as builtins for MSVC. */
/* Select the correct function based on the size of long. */
#ifdef __LP64__
#define _lrotl(a,b) __rolq((a), (b))
#define _lrotr(a,b) __rorq((a), (b))
#else
#define _lrotl(a,b) __rold((a), (b))
#define _lrotr(a,b) __rord((a), (b))
#endif
#define _rotl(a,b) __rold((a), (b))
#define _rotr(a,b) __rord((a), (b))
#endif // _MSC_VER

/* These are not builtins so need to be provided in all modes. */
#define _rotwl(a,b) __rolw((a), (b))
#define _rotwr(a,b) __rorw((a), (b))

#undef __DEFAULT_FN_ATTRS
#undef __DEFAULT_FN_ATTRS_CAST
#undef __DEFAULT_FN_ATTRS_CRC32
#undef __DEFAULT_FN_ATTRS_CONSTEXPR

#endif /* __IA32INTRIN_H */