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cuda_wrappers
[ DIR ]
drwxr-xr-x
2025-06-02 12:56
llvm_libc_wrappers
[ DIR ]
drwxr-xr-x
2025-06-02 12:56
openmp_wrappers
[ DIR ]
drwxr-xr-x
2025-06-02 12:56
ppc_wrappers
[ DIR ]
drwxr-xr-x
2025-06-02 12:56
__clang_cuda_builtin_vars.h
4.78
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__clang_cuda_cmath.h
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__clang_cuda_complex_builtins.h
9.36
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__clang_cuda_device_functions.h
56.68
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__clang_cuda_intrinsics.h
29.93
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__clang_cuda_libdevice_declares.h
21.87
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__clang_cuda_math.h
15.99
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__clang_cuda_math_forward_declares.h
8.27
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__clang_cuda_runtime_wrapper.h
17.61
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__clang_cuda_texture_intrinsics.h
31.86
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__clang_hip_cmath.h
26.34
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__clang_hip_libdevice_declares.h
19.87
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__clang_hip_math.h
31.96
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__clang_hip_runtime_wrapper.h
4.65
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__clang_hip_stdlib.h
1.19
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__stddef_max_align_t.h
857
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__wmmintrin_aes.h
5.15
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__wmmintrin_pclmul.h
1.99
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adxintrin.h
7.37
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altivec.h
697.32
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ammintrin.h
7.54
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amxcomplexintrin.h
6.81
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amxfp16intrin.h
1.82
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amxintrin.h
21.12
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arm64intr.h
993
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arm_acle.h
25.66
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arm_bf16.h
548
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2024-11-06 08:03
arm_cde.h
32.67
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arm_cmse.h
6.21
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arm_fp16.h
16.92
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arm_mve.h
1.48
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arm_neon.h
2.45
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arm_neon_sve_bridge.h
9.48
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arm_sme_draft_spec_subject_to_change.h
60.2
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arm_sve.h
1.51
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armintr.h
843
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avx2intrin.h
186.96
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avx512bf16intrin.h
10.51
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avx512bitalgintrin.h
2.41
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avx512bwintrin.h
75.33
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avx512cdintrin.h
4.12
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avx512dqintrin.h
58.75
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avx512erintrin.h
11.83
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avx512fintrin.h
382.64
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avx512fp16intrin.h
156.63
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avx512ifmaintrin.h
2.49
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avx512ifmavlintrin.h
4.31
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avx512pfintrin.h
4.53
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avx512vbmi2intrin.h
13.17
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avx512vbmiintrin.h
3.72
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avx512vbmivlintrin.h
6.94
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avx512vlbf16intrin.h
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avx512vlbitalgintrin.h
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avx512vlbwintrin.h
121.26
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avx512vlcdintrin.h
7.66
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avx512vldqintrin.h
46.41
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avx512vlfp16intrin.h
85.51
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avx512vlintrin.h
322.29
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avx512vlvbmi2intrin.h
25.72
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avx512vlvnniintrin.h
13.13
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avx512vlvp2intersectintrin.h
4.44
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avx512vnniintrin.h
4.21
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avx512vp2intersectintrin.h
2.9
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avx512vpopcntdqintrin.h
2
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avx512vpopcntdqvlintrin.h
3.31
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avxifmaintrin.h
5.75
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avxintrin.h
195.41
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avxneconvertintrin.h
14.09
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avxvnniint16intrin.h
17.41
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avxvnniint8intrin.h
18.67
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avxvnniintrin.h
10.44
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bmi2intrin.h
7.09
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bmiintrin.h
14.12
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builtins.h
741
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cet.h
1.49
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cetintrin.h
3.27
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cldemoteintrin.h
1.18
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clflushoptintrin.h
1.17
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clwbintrin.h
1.2
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clzerointrin.h
1.19
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cmpccxaddintrin.h
2.33
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cpuid.h
11.01
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crc32intrin.h
3.27
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emmintrin.h
192.64
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enqcmdintrin.h
2.12
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f16cintrin.h
5.39
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float.h
5.63
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fma4intrin.h
6.82
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fmaintrin.h
28.4
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fxsrintrin.h
2.82
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gfniintrin.h
7.57
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hexagon_circ_brev_intrinsics.h
15.59
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hexagon_protos.h
374.42
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hexagon_types.h
130.33
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hresetintrin.h
1.36
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htmintrin.h
6.14
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htmxlintrin.h
9.01
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hvx_hexagon_protos.h
254.26
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ia32intrin.h
12.72
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immintrin.h
23.57
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intrin.h
28.22
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inttypes.h
2.26
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invpcidintrin.h
764
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iso646.h
656
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keylockerintrin.h
17.98
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larchintrin.h
7.8
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limits.h
3.61
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lwpintrin.h
5
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lzcntintrin.h
3.18
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mm3dnow.h
4.5
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mm_malloc.h
1.88
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mmintrin.h
55.98
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module.modulemap
3.33
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movdirintrin.h
1.57
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msa.h
25.01
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mwaitxintrin.h
2.19
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nmmintrin.h
709
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opencl-c-base.h
30.38
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opencl-c.h
874.39
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pconfigintrin.h
1.19
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pkuintrin.h
934
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pmmintrin.h
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popcntintrin.h
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prfchiintrin.h
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prfchwintrin.h
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ptwriteintrin.h
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raointintrin.h
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rdpruintrin.h
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rdseedintrin.h
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riscv_ntlh.h
855
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rtmintrin.h
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s390intrin.h
604
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serializeintrin.h
881
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sgxintrin.h
1.77
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sha512intrin.h
5.95
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shaintrin.h
7.37
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sifive_vector.h
522
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sm3intrin.h
7.29
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sm4intrin.h
8.2
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smmintrin.h
99.32
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stdalign.h
911
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stdarg.h
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stdatomic.h
8.3
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stdbool.h
1.04
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stddef.h
4.16
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stdint.h
32.49
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stdnoreturn.h
1.17
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tbmintrin.h
3.15
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tgmath.h
29.68
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tmmintrin.h
29.51
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tsxldtrkintrin.h
1.97
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uintrintrin.h
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unwind.h
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vadefs.h
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vaesintrin.h
2.46
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varargs.h
477
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vecintrin.h
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velintrin.h
2.1
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velintrin_approx.h
3.54
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velintrin_gen.h
69.06
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vpclmulqdqintrin.h
1.06
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waitpkgintrin.h
1.33
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wasm_simd128.h
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wbnoinvdintrin.h
749
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wmmintrin.h
659
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x86gprintrin.h
2.32
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x86intrin.h
1.81
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xmmintrin.h
106.73
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xopintrin.h
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xsavecintrin.h
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xsaveintrin.h
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xsaveoptintrin.h
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xsavesintrin.h
1.24
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xtestintrin.h
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Save
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/*===---- tmmintrin.h - SSSE3 intrinsics -----------------------------------=== * * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. * See https://llvm.org/LICENSE.txt for license information. * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception * *===-----------------------------------------------------------------------=== */ #ifndef __TMMINTRIN_H #define __TMMINTRIN_H #if !defined(__i386__) && !defined(__x86_64__) #error "This header is only meant to be used on x86 and x64 architecture" #endif #include <pmmintrin.h> /* Define the default attributes for the functions in this file. */ #define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("ssse3"), __min_vector_width__(64))) #define __DEFAULT_FN_ATTRS_MMX __attribute__((__always_inline__, __nodebug__, __target__("mmx,ssse3"), __min_vector_width__(64))) /// Computes the absolute value of each of the packed 8-bit signed /// integers in the source operand and stores the 8-bit unsigned integer /// results in the destination. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the \c PABSB instruction. /// /// \param __a /// A 64-bit vector of [8 x i8]. /// \returns A 64-bit integer vector containing the absolute values of the /// elements in the operand. static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX _mm_abs_pi8(__m64 __a) { return (__m64)__builtin_ia32_pabsb((__v8qi)__a); } /// Computes the absolute value of each of the packed 8-bit signed /// integers in the source operand and stores the 8-bit unsigned integer /// results in the destination. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the \c VPABSB instruction. /// /// \param __a /// A 128-bit vector of [16 x i8]. /// \returns A 128-bit integer vector containing the absolute values of the /// elements in the operand. static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_abs_epi8(__m128i __a) { return (__m128i)__builtin_elementwise_abs((__v16qs)__a); } /// Computes the absolute value of each of the packed 16-bit signed /// integers in the source operand and stores the 16-bit unsigned integer /// results in the destination. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the \c PABSW instruction. /// /// \param __a /// A 64-bit vector of [4 x i16]. /// \returns A 64-bit integer vector containing the absolute values of the /// elements in the operand. static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX _mm_abs_pi16(__m64 __a) { return (__m64)__builtin_ia32_pabsw((__v4hi)__a); } /// Computes the absolute value of each of the packed 16-bit signed /// integers in the source operand and stores the 16-bit unsigned integer /// results in the destination. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the \c VPABSW instruction. /// /// \param __a /// A 128-bit vector of [8 x i16]. /// \returns A 128-bit integer vector containing the absolute values of the /// elements in the operand. static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_abs_epi16(__m128i __a) { return (__m128i)__builtin_elementwise_abs((__v8hi)__a); } /// Computes the absolute value of each of the packed 32-bit signed /// integers in the source operand and stores the 32-bit unsigned integer /// results in the destination. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the \c PABSD instruction. /// /// \param __a /// A 64-bit vector of [2 x i32]. /// \returns A 64-bit integer vector containing the absolute values of the /// elements in the operand. static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX _mm_abs_pi32(__m64 __a) { return (__m64)__builtin_ia32_pabsd((__v2si)__a); } /// Computes the absolute value of each of the packed 32-bit signed /// integers in the source operand and stores the 32-bit unsigned integer /// results in the destination. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the \c VPABSD instruction. /// /// \param __a /// A 128-bit vector of [4 x i32]. /// \returns A 128-bit integer vector containing the absolute values of the /// elements in the operand. static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_abs_epi32(__m128i __a) { return (__m128i)__builtin_elementwise_abs((__v4si)__a); } /// Concatenates the two 128-bit integer vector operands, and /// right-shifts the result by the number of bytes specified in the immediate /// operand. /// /// \headerfile <x86intrin.h> /// /// \code /// __m128i _mm_alignr_epi8(__m128i a, __m128i b, const int n); /// \endcode /// /// This intrinsic corresponds to the \c PALIGNR instruction. /// /// \param a /// A 128-bit vector of [16 x i8] containing one of the source operands. /// \param b /// A 128-bit vector of [16 x i8] containing one of the source operands. /// \param n /// An immediate operand specifying how many bytes to right-shift the result. /// \returns A 128-bit integer vector containing the concatenated right-shifted /// value. #define _mm_alignr_epi8(a, b, n) \ ((__m128i)__builtin_ia32_palignr128((__v16qi)(__m128i)(a), \ (__v16qi)(__m128i)(b), (n))) /// Concatenates the two 64-bit integer vector operands, and right-shifts /// the result by the number of bytes specified in the immediate operand. /// /// \headerfile <x86intrin.h> /// /// \code /// __m64 _mm_alignr_pi8(__m64 a, __m64 b, const int n); /// \endcode /// /// This intrinsic corresponds to the \c PALIGNR instruction. /// /// \param a /// A 64-bit vector of [8 x i8] containing one of the source operands. /// \param b /// A 64-bit vector of [8 x i8] containing one of the source operands. /// \param n /// An immediate operand specifying how many bytes to right-shift the result. /// \returns A 64-bit integer vector containing the concatenated right-shifted /// value. #define _mm_alignr_pi8(a, b, n) \ ((__m64)__builtin_ia32_palignr((__v8qi)(__m64)(a), (__v8qi)(__m64)(b), (n))) /// Horizontally adds the adjacent pairs of values contained in 2 packed /// 128-bit vectors of [8 x i16]. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the \c VPHADDW instruction. /// /// \param __a /// A 128-bit vector of [8 x i16] containing one of the source operands. The /// horizontal sums of the values are stored in the lower bits of the /// destination. /// \param __b /// A 128-bit vector of [8 x i16] containing one of the source operands. The /// horizontal sums of the values are stored in the upper bits of the /// destination. /// \returns A 128-bit vector of [8 x i16] containing the horizontal sums of /// both operands. static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_hadd_epi16(__m128i __a, __m128i __b) { return (__m128i)__builtin_ia32_phaddw128((__v8hi)__a, (__v8hi)__b); } /// Horizontally adds the adjacent pairs of values contained in 2 packed /// 128-bit vectors of [4 x i32]. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the \c VPHADDD instruction. /// /// \param __a /// A 128-bit vector of [4 x i32] containing one of the source operands. The /// horizontal sums of the values are stored in the lower bits of the /// destination. /// \param __b /// A 128-bit vector of [4 x i32] containing one of the source operands. The /// horizontal sums of the values are stored in the upper bits of the /// destination. /// \returns A 128-bit vector of [4 x i32] containing the horizontal sums of /// both operands. static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_hadd_epi32(__m128i __a, __m128i __b) { return (__m128i)__builtin_ia32_phaddd128((__v4si)__a, (__v4si)__b); } /// Horizontally adds the adjacent pairs of values contained in 2 packed /// 64-bit vectors of [4 x i16]. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the \c PHADDW instruction. /// /// \param __a /// A 64-bit vector of [4 x i16] containing one of the source operands. The /// horizontal sums of the values are stored in the lower bits of the /// destination. /// \param __b /// A 64-bit vector of [4 x i16] containing one of the source operands. The /// horizontal sums of the values are stored in the upper bits of the /// destination. /// \returns A 64-bit vector of [4 x i16] containing the horizontal sums of both /// operands. static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX _mm_hadd_pi16(__m64 __a, __m64 __b) { return (__m64)__builtin_ia32_phaddw((__v4hi)__a, (__v4hi)__b); } /// Horizontally adds the adjacent pairs of values contained in 2 packed /// 64-bit vectors of [2 x i32]. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the \c PHADDD instruction. /// /// \param __a /// A 64-bit vector of [2 x i32] containing one of the source operands. The /// horizontal sums of the values are stored in the lower bits of the /// destination. /// \param __b /// A 64-bit vector of [2 x i32] containing one of the source operands. The /// horizontal sums of the values are stored in the upper bits of the /// destination. /// \returns A 64-bit vector of [2 x i32] containing the horizontal sums of both /// operands. static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX _mm_hadd_pi32(__m64 __a, __m64 __b) { return (__m64)__builtin_ia32_phaddd((__v2si)__a, (__v2si)__b); } /// Horizontally adds the adjacent pairs of values contained in 2 packed /// 128-bit vectors of [8 x i16]. Positive sums greater than 0x7FFF are /// saturated to 0x7FFF. Negative sums less than 0x8000 are saturated to /// 0x8000. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the \c VPHADDSW instruction. /// /// \param __a /// A 128-bit vector of [8 x i16] containing one of the source operands. The /// horizontal sums of the values are stored in the lower bits of the /// destination. /// \param __b /// A 128-bit vector of [8 x i16] containing one of the source operands. The /// horizontal sums of the values are stored in the upper bits of the /// destination. /// \returns A 128-bit vector of [8 x i16] containing the horizontal saturated /// sums of both operands. static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_hadds_epi16(__m128i __a, __m128i __b) { return (__m128i)__builtin_ia32_phaddsw128((__v8hi)__a, (__v8hi)__b); } /// Horizontally adds the adjacent pairs of values contained in 2 packed /// 64-bit vectors of [4 x i16]. Positive sums greater than 0x7FFF are /// saturated to 0x7FFF. Negative sums less than 0x8000 are saturated to /// 0x8000. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the \c PHADDSW instruction. /// /// \param __a /// A 64-bit vector of [4 x i16] containing one of the source operands. The /// horizontal sums of the values are stored in the lower bits of the /// destination. /// \param __b /// A 64-bit vector of [4 x i16] containing one of the source operands. The /// horizontal sums of the values are stored in the upper bits of the /// destination. /// \returns A 64-bit vector of [4 x i16] containing the horizontal saturated /// sums of both operands. static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX _mm_hadds_pi16(__m64 __a, __m64 __b) { return (__m64)__builtin_ia32_phaddsw((__v4hi)__a, (__v4hi)__b); } /// Horizontally subtracts the adjacent pairs of values contained in 2 /// packed 128-bit vectors of [8 x i16]. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the \c VPHSUBW instruction. /// /// \param __a /// A 128-bit vector of [8 x i16] containing one of the source operands. The /// horizontal differences between the values are stored in the lower bits of /// the destination. /// \param __b /// A 128-bit vector of [8 x i16] containing one of the source operands. The /// horizontal differences between the values are stored in the upper bits of /// the destination. /// \returns A 128-bit vector of [8 x i16] containing the horizontal differences /// of both operands. static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_hsub_epi16(__m128i __a, __m128i __b) { return (__m128i)__builtin_ia32_phsubw128((__v8hi)__a, (__v8hi)__b); } /// Horizontally subtracts the adjacent pairs of values contained in 2 /// packed 128-bit vectors of [4 x i32]. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the \c VPHSUBD instruction. /// /// \param __a /// A 128-bit vector of [4 x i32] containing one of the source operands. The /// horizontal differences between the values are stored in the lower bits of /// the destination. /// \param __b /// A 128-bit vector of [4 x i32] containing one of the source operands. The /// horizontal differences between the values are stored in the upper bits of /// the destination. /// \returns A 128-bit vector of [4 x i32] containing the horizontal differences /// of both operands. static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_hsub_epi32(__m128i __a, __m128i __b) { return (__m128i)__builtin_ia32_phsubd128((__v4si)__a, (__v4si)__b); } /// Horizontally subtracts the adjacent pairs of values contained in 2 /// packed 64-bit vectors of [4 x i16]. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the \c PHSUBW instruction. /// /// \param __a /// A 64-bit vector of [4 x i16] containing one of the source operands. The /// horizontal differences between the values are stored in the lower bits of /// the destination. /// \param __b /// A 64-bit vector of [4 x i16] containing one of the source operands. The /// horizontal differences between the values are stored in the upper bits of /// the destination. /// \returns A 64-bit vector of [4 x i16] containing the horizontal differences /// of both operands. static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX _mm_hsub_pi16(__m64 __a, __m64 __b) { return (__m64)__builtin_ia32_phsubw((__v4hi)__a, (__v4hi)__b); } /// Horizontally subtracts the adjacent pairs of values contained in 2 /// packed 64-bit vectors of [2 x i32]. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the \c PHSUBD instruction. /// /// \param __a /// A 64-bit vector of [2 x i32] containing one of the source operands. The /// horizontal differences between the values are stored in the lower bits of /// the destination. /// \param __b /// A 64-bit vector of [2 x i32] containing one of the source operands. The /// horizontal differences between the values are stored in the upper bits of /// the destination. /// \returns A 64-bit vector of [2 x i32] containing the horizontal differences /// of both operands. static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX _mm_hsub_pi32(__m64 __a, __m64 __b) { return (__m64)__builtin_ia32_phsubd((__v2si)__a, (__v2si)__b); } /// Horizontally subtracts the adjacent pairs of values contained in 2 /// packed 128-bit vectors of [8 x i16]. Positive differences greater than /// 0x7FFF are saturated to 0x7FFF. Negative differences less than 0x8000 are /// saturated to 0x8000. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the \c VPHSUBSW instruction. /// /// \param __a /// A 128-bit vector of [8 x i16] containing one of the source operands. The /// horizontal differences between the values are stored in the lower bits of /// the destination. /// \param __b /// A 128-bit vector of [8 x i16] containing one of the source operands. The /// horizontal differences between the values are stored in the upper bits of /// the destination. /// \returns A 128-bit vector of [8 x i16] containing the horizontal saturated /// differences of both operands. static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_hsubs_epi16(__m128i __a, __m128i __b) { return (__m128i)__builtin_ia32_phsubsw128((__v8hi)__a, (__v8hi)__b); } /// Horizontally subtracts the adjacent pairs of values contained in 2 /// packed 64-bit vectors of [4 x i16]. Positive differences greater than /// 0x7FFF are saturated to 0x7FFF. Negative differences less than 0x8000 are /// saturated to 0x8000. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the \c PHSUBSW instruction. /// /// \param __a /// A 64-bit vector of [4 x i16] containing one of the source operands. The /// horizontal differences between the values are stored in the lower bits of /// the destination. /// \param __b /// A 64-bit vector of [4 x i16] containing one of the source operands. The /// horizontal differences between the values are stored in the upper bits of /// the destination. /// \returns A 64-bit vector of [4 x i16] containing the horizontal saturated /// differences of both operands. static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX _mm_hsubs_pi16(__m64 __a, __m64 __b) { return (__m64)__builtin_ia32_phsubsw((__v4hi)__a, (__v4hi)__b); } /// Multiplies corresponding pairs of packed 8-bit unsigned integer /// values contained in the first source operand and packed 8-bit signed /// integer values contained in the second source operand, adds pairs of /// contiguous products with signed saturation, and writes the 16-bit sums to /// the corresponding bits in the destination. /// /// For example, bits [7:0] of both operands are multiplied, bits [15:8] of /// both operands are multiplied, and the sum of both results is written to /// bits [15:0] of the destination. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the \c VPMADDUBSW instruction. /// /// \param __a /// A 128-bit integer vector containing the first source operand. /// \param __b /// A 128-bit integer vector containing the second source operand. /// \returns A 128-bit integer vector containing the sums of products of both /// operands: \n /// \a R0 := (\a __a0 * \a __b0) + (\a __a1 * \a __b1) \n /// \a R1 := (\a __a2 * \a __b2) + (\a __a3 * \a __b3) \n /// \a R2 := (\a __a4 * \a __b4) + (\a __a5 * \a __b5) \n /// \a R3 := (\a __a6 * \a __b6) + (\a __a7 * \a __b7) \n /// \a R4 := (\a __a8 * \a __b8) + (\a __a9 * \a __b9) \n /// \a R5 := (\a __a10 * \a __b10) + (\a __a11 * \a __b11) \n /// \a R6 := (\a __a12 * \a __b12) + (\a __a13 * \a __b13) \n /// \a R7 := (\a __a14 * \a __b14) + (\a __a15 * \a __b15) static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_maddubs_epi16(__m128i __a, __m128i __b) { return (__m128i)__builtin_ia32_pmaddubsw128((__v16qi)__a, (__v16qi)__b); } /// Multiplies corresponding pairs of packed 8-bit unsigned integer /// values contained in the first source operand and packed 8-bit signed /// integer values contained in the second source operand, adds pairs of /// contiguous products with signed saturation, and writes the 16-bit sums to /// the corresponding bits in the destination. /// /// For example, bits [7:0] of both operands are multiplied, bits [15:8] of /// both operands are multiplied, and the sum of both results is written to /// bits [15:0] of the destination. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the \c PMADDUBSW instruction. /// /// \param __a /// A 64-bit integer vector containing the first source operand. /// \param __b /// A 64-bit integer vector containing the second source operand. /// \returns A 64-bit integer vector containing the sums of products of both /// operands: \n /// \a R0 := (\a __a0 * \a __b0) + (\a __a1 * \a __b1) \n /// \a R1 := (\a __a2 * \a __b2) + (\a __a3 * \a __b3) \n /// \a R2 := (\a __a4 * \a __b4) + (\a __a5 * \a __b5) \n /// \a R3 := (\a __a6 * \a __b6) + (\a __a7 * \a __b7) static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX _mm_maddubs_pi16(__m64 __a, __m64 __b) { return (__m64)__builtin_ia32_pmaddubsw((__v8qi)__a, (__v8qi)__b); } /// Multiplies packed 16-bit signed integer values, truncates the 32-bit /// products to the 18 most significant bits by right-shifting, rounds the /// truncated value by adding 1, and writes bits [16:1] to the destination. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the \c VPMULHRSW instruction. /// /// \param __a /// A 128-bit vector of [8 x i16] containing one of the source operands. /// \param __b /// A 128-bit vector of [8 x i16] containing one of the source operands. /// \returns A 128-bit vector of [8 x i16] containing the rounded and scaled /// products of both operands. static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mulhrs_epi16(__m128i __a, __m128i __b) { return (__m128i)__builtin_ia32_pmulhrsw128((__v8hi)__a, (__v8hi)__b); } /// Multiplies packed 16-bit signed integer values, truncates the 32-bit /// products to the 18 most significant bits by right-shifting, rounds the /// truncated value by adding 1, and writes bits [16:1] to the destination. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the \c PMULHRSW instruction. /// /// \param __a /// A 64-bit vector of [4 x i16] containing one of the source operands. /// \param __b /// A 64-bit vector of [4 x i16] containing one of the source operands. /// \returns A 64-bit vector of [4 x i16] containing the rounded and scaled /// products of both operands. static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX _mm_mulhrs_pi16(__m64 __a, __m64 __b) { return (__m64)__builtin_ia32_pmulhrsw((__v4hi)__a, (__v4hi)__b); } /// Copies the 8-bit integers from a 128-bit integer vector to the /// destination or clears 8-bit values in the destination, as specified by /// the second source operand. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the \c VPSHUFB instruction. /// /// \param __a /// A 128-bit integer vector containing the values to be copied. /// \param __b /// A 128-bit integer vector containing control bytes corresponding to /// positions in the destination: /// Bit 7: \n /// 1: Clear the corresponding byte in the destination. \n /// 0: Copy the selected source byte to the corresponding byte in the /// destination. \n /// Bits [6:4] Reserved. \n /// Bits [3:0] select the source byte to be copied. /// \returns A 128-bit integer vector containing the copied or cleared values. static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_shuffle_epi8(__m128i __a, __m128i __b) { return (__m128i)__builtin_ia32_pshufb128((__v16qi)__a, (__v16qi)__b); } /// Copies the 8-bit integers from a 64-bit integer vector to the /// destination or clears 8-bit values in the destination, as specified by /// the second source operand. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the \c PSHUFB instruction. /// /// \param __a /// A 64-bit integer vector containing the values to be copied. /// \param __b /// A 64-bit integer vector containing control bytes corresponding to /// positions in the destination: /// Bit 7: \n /// 1: Clear the corresponding byte in the destination. \n /// 0: Copy the selected source byte to the corresponding byte in the /// destination. \n /// Bits [3:0] select the source byte to be copied. /// \returns A 64-bit integer vector containing the copied or cleared values. static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX _mm_shuffle_pi8(__m64 __a, __m64 __b) { return (__m64)__builtin_ia32_pshufb((__v8qi)__a, (__v8qi)__b); } /// For each 8-bit integer in the first source operand, perform one of /// the following actions as specified by the second source operand. /// /// If the byte in the second source is negative, calculate the two's /// complement of the corresponding byte in the first source, and write that /// value to the destination. If the byte in the second source is positive, /// copy the corresponding byte from the first source to the destination. If /// the byte in the second source is zero, clear the corresponding byte in /// the destination. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the \c VPSIGNB instruction. /// /// \param __a /// A 128-bit integer vector containing the values to be copied. /// \param __b /// A 128-bit integer vector containing control bytes corresponding to /// positions in the destination. /// \returns A 128-bit integer vector containing the resultant values. static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sign_epi8(__m128i __a, __m128i __b) { return (__m128i)__builtin_ia32_psignb128((__v16qi)__a, (__v16qi)__b); } /// For each 16-bit integer in the first source operand, perform one of /// the following actions as specified by the second source operand. /// /// If the word in the second source is negative, calculate the two's /// complement of the corresponding word in the first source, and write that /// value to the destination. If the word in the second source is positive, /// copy the corresponding word from the first source to the destination. If /// the word in the second source is zero, clear the corresponding word in /// the destination. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the \c VPSIGNW instruction. /// /// \param __a /// A 128-bit integer vector containing the values to be copied. /// \param __b /// A 128-bit integer vector containing control words corresponding to /// positions in the destination. /// \returns A 128-bit integer vector containing the resultant values. static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sign_epi16(__m128i __a, __m128i __b) { return (__m128i)__builtin_ia32_psignw128((__v8hi)__a, (__v8hi)__b); } /// For each 32-bit integer in the first source operand, perform one of /// the following actions as specified by the second source operand. /// /// If the doubleword in the second source is negative, calculate the two's /// complement of the corresponding word in the first source, and write that /// value to the destination. If the doubleword in the second source is /// positive, copy the corresponding word from the first source to the /// destination. If the doubleword in the second source is zero, clear the /// corresponding word in the destination. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the \c VPSIGND instruction. /// /// \param __a /// A 128-bit integer vector containing the values to be copied. /// \param __b /// A 128-bit integer vector containing control doublewords corresponding to /// positions in the destination. /// \returns A 128-bit integer vector containing the resultant values. static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sign_epi32(__m128i __a, __m128i __b) { return (__m128i)__builtin_ia32_psignd128((__v4si)__a, (__v4si)__b); } /// For each 8-bit integer in the first source operand, perform one of /// the following actions as specified by the second source operand. /// /// If the byte in the second source is negative, calculate the two's /// complement of the corresponding byte in the first source, and write that /// value to the destination. If the byte in the second source is positive, /// copy the corresponding byte from the first source to the destination. If /// the byte in the second source is zero, clear the corresponding byte in /// the destination. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the \c PSIGNB instruction. /// /// \param __a /// A 64-bit integer vector containing the values to be copied. /// \param __b /// A 64-bit integer vector containing control bytes corresponding to /// positions in the destination. /// \returns A 64-bit integer vector containing the resultant values. static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX _mm_sign_pi8(__m64 __a, __m64 __b) { return (__m64)__builtin_ia32_psignb((__v8qi)__a, (__v8qi)__b); } /// For each 16-bit integer in the first source operand, perform one of /// the following actions as specified by the second source operand. /// /// If the word in the second source is negative, calculate the two's /// complement of the corresponding word in the first source, and write that /// value to the destination. If the word in the second source is positive, /// copy the corresponding word from the first source to the destination. If /// the word in the second source is zero, clear the corresponding word in /// the destination. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the \c PSIGNW instruction. /// /// \param __a /// A 64-bit integer vector containing the values to be copied. /// \param __b /// A 64-bit integer vector containing control words corresponding to /// positions in the destination. /// \returns A 64-bit integer vector containing the resultant values. static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX _mm_sign_pi16(__m64 __a, __m64 __b) { return (__m64)__builtin_ia32_psignw((__v4hi)__a, (__v4hi)__b); } /// For each 32-bit integer in the first source operand, perform one of /// the following actions as specified by the second source operand. /// /// If the doubleword in the second source is negative, calculate the two's /// complement of the corresponding doubleword in the first source, and /// write that value to the destination. If the doubleword in the second /// source is positive, copy the corresponding doubleword from the first /// source to the destination. If the doubleword in the second source is /// zero, clear the corresponding doubleword in the destination. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the \c PSIGND instruction. /// /// \param __a /// A 64-bit integer vector containing the values to be copied. /// \param __b /// A 64-bit integer vector containing two control doublewords corresponding /// to positions in the destination. /// \returns A 64-bit integer vector containing the resultant values. static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX _mm_sign_pi32(__m64 __a, __m64 __b) { return (__m64)__builtin_ia32_psignd((__v2si)__a, (__v2si)__b); } #undef __DEFAULT_FN_ATTRS #undef __DEFAULT_FN_ATTRS_MMX #endif /* __TMMINTRIN_H */