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cuda_wrappers
[ DIR ]
drwxr-xr-x
2025-06-02 12:56
llvm_libc_wrappers
[ DIR ]
drwxr-xr-x
2025-06-02 12:56
openmp_wrappers
[ DIR ]
drwxr-xr-x
2025-06-02 12:56
ppc_wrappers
[ DIR ]
drwxr-xr-x
2025-06-02 12:56
__clang_cuda_builtin_vars.h
4.78
KB
-rw-r--r--
2023-11-28 08:52
__clang_cuda_cmath.h
18.06
KB
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2023-11-28 08:52
__clang_cuda_complex_builtins.h
9.36
KB
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2023-11-28 08:52
__clang_cuda_device_functions.h
56.68
KB
-rw-r--r--
2023-11-28 08:52
__clang_cuda_intrinsics.h
29.93
KB
-rw-r--r--
2023-11-28 08:52
__clang_cuda_libdevice_declares.h
21.87
KB
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2023-11-28 08:52
__clang_cuda_math.h
15.99
KB
-rw-r--r--
2023-11-28 08:52
__clang_cuda_math_forward_declares.h
8.27
KB
-rw-r--r--
2023-11-28 08:52
__clang_cuda_runtime_wrapper.h
17.61
KB
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2023-11-28 08:52
__clang_cuda_texture_intrinsics.h
31.86
KB
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2023-11-28 08:52
__clang_hip_cmath.h
26.34
KB
-rw-r--r--
2023-11-28 08:52
__clang_hip_libdevice_declares.h
19.87
KB
-rw-r--r--
2023-11-28 08:52
__clang_hip_math.h
31.96
KB
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2023-11-28 08:52
__clang_hip_runtime_wrapper.h
4.65
KB
-rw-r--r--
2023-11-28 08:52
__clang_hip_stdlib.h
1.19
KB
-rw-r--r--
2023-11-28 08:52
__stddef_max_align_t.h
857
B
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2023-11-28 08:52
__wmmintrin_aes.h
5.15
KB
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2023-11-28 08:52
__wmmintrin_pclmul.h
1.99
KB
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2023-11-28 08:52
adxintrin.h
7.37
KB
-rw-r--r--
2023-11-28 08:52
altivec.h
697.32
KB
-rw-r--r--
2023-11-28 08:52
ammintrin.h
7.54
KB
-rw-r--r--
2023-11-28 08:52
amxcomplexintrin.h
6.81
KB
-rw-r--r--
2023-11-28 08:52
amxfp16intrin.h
1.82
KB
-rw-r--r--
2023-11-28 08:52
amxintrin.h
21.12
KB
-rw-r--r--
2023-11-28 08:52
arm64intr.h
993
B
-rw-r--r--
2023-11-28 08:52
arm_acle.h
25.66
KB
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2023-11-28 08:52
arm_bf16.h
548
B
-rw-r--r--
2024-11-06 08:03
arm_cde.h
32.67
KB
-rw-r--r--
2024-11-06 08:03
arm_cmse.h
6.21
KB
-rw-r--r--
2023-11-28 08:52
arm_fp16.h
16.92
KB
-rw-r--r--
2024-11-06 08:03
arm_mve.h
1.48
MB
-rw-r--r--
2024-11-06 08:03
arm_neon.h
2.45
MB
-rw-r--r--
2024-11-06 08:03
arm_neon_sve_bridge.h
9.48
KB
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2023-11-28 08:52
arm_sme_draft_spec_subject_to_change.h
60.2
KB
-rw-r--r--
2024-11-06 08:03
arm_sve.h
1.51
MB
-rw-r--r--
2024-11-06 08:03
armintr.h
843
B
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2023-11-28 08:52
avx2intrin.h
186.96
KB
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2023-11-28 08:52
avx512bf16intrin.h
10.51
KB
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2023-11-28 08:52
avx512bitalgintrin.h
2.41
KB
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2023-11-28 08:52
avx512bwintrin.h
75.33
KB
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2023-11-28 08:52
avx512cdintrin.h
4.12
KB
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2023-11-28 08:52
avx512dqintrin.h
58.75
KB
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2023-11-28 08:52
avx512erintrin.h
11.83
KB
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2023-11-28 08:52
avx512fintrin.h
382.64
KB
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2023-11-28 08:52
avx512fp16intrin.h
156.63
KB
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2023-11-28 08:52
avx512ifmaintrin.h
2.49
KB
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2023-11-28 08:52
avx512ifmavlintrin.h
4.31
KB
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2023-11-28 08:52
avx512pfintrin.h
4.53
KB
-rw-r--r--
2023-11-28 08:52
avx512vbmi2intrin.h
13.17
KB
-rw-r--r--
2023-11-28 08:52
avx512vbmiintrin.h
3.72
KB
-rw-r--r--
2023-11-28 08:52
avx512vbmivlintrin.h
6.94
KB
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2023-11-28 08:52
avx512vlbf16intrin.h
19.21
KB
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2023-11-28 08:52
avx512vlbitalgintrin.h
4.23
KB
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2023-11-28 08:52
avx512vlbwintrin.h
121.26
KB
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2023-11-28 08:52
avx512vlcdintrin.h
7.66
KB
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2023-11-28 08:52
avx512vldqintrin.h
46.41
KB
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2023-11-28 08:52
avx512vlfp16intrin.h
85.51
KB
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2023-11-28 08:52
avx512vlintrin.h
322.29
KB
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2023-11-28 08:52
avx512vlvbmi2intrin.h
25.72
KB
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2023-11-28 08:52
avx512vlvnniintrin.h
13.13
KB
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2023-11-28 08:52
avx512vlvp2intersectintrin.h
4.44
KB
-rw-r--r--
2023-11-28 08:52
avx512vnniintrin.h
4.21
KB
-rw-r--r--
2023-11-28 08:52
avx512vp2intersectintrin.h
2.9
KB
-rw-r--r--
2023-11-28 08:52
avx512vpopcntdqintrin.h
2
KB
-rw-r--r--
2023-11-28 08:52
avx512vpopcntdqvlintrin.h
3.31
KB
-rw-r--r--
2023-11-28 08:52
avxifmaintrin.h
5.75
KB
-rw-r--r--
2023-11-28 08:52
avxintrin.h
195.41
KB
-rw-r--r--
2023-11-28 08:52
avxneconvertintrin.h
14.09
KB
-rw-r--r--
2023-11-28 08:52
avxvnniint16intrin.h
17.41
KB
-rw-r--r--
2023-11-28 08:52
avxvnniint8intrin.h
18.67
KB
-rw-r--r--
2023-11-28 08:52
avxvnniintrin.h
10.44
KB
-rw-r--r--
2023-11-28 08:52
bmi2intrin.h
7.09
KB
-rw-r--r--
2023-11-28 08:52
bmiintrin.h
14.12
KB
-rw-r--r--
2023-11-28 08:52
builtins.h
741
B
-rw-r--r--
2023-11-28 08:52
cet.h
1.49
KB
-rw-r--r--
2023-11-28 08:52
cetintrin.h
3.27
KB
-rw-r--r--
2023-11-28 08:52
cldemoteintrin.h
1.18
KB
-rw-r--r--
2023-11-28 08:52
clflushoptintrin.h
1.17
KB
-rw-r--r--
2023-11-28 08:52
clwbintrin.h
1.2
KB
-rw-r--r--
2023-11-28 08:52
clzerointrin.h
1.19
KB
-rw-r--r--
2023-11-28 08:52
cmpccxaddintrin.h
2.33
KB
-rw-r--r--
2023-11-28 08:52
cpuid.h
11.01
KB
-rw-r--r--
2023-11-28 08:52
crc32intrin.h
3.27
KB
-rw-r--r--
2023-11-28 08:52
emmintrin.h
192.64
KB
-rw-r--r--
2023-11-28 08:52
enqcmdintrin.h
2.12
KB
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2023-11-28 08:52
f16cintrin.h
5.39
KB
-rw-r--r--
2023-11-28 08:52
float.h
5.63
KB
-rw-r--r--
2023-11-28 08:52
fma4intrin.h
6.82
KB
-rw-r--r--
2023-11-28 08:52
fmaintrin.h
28.4
KB
-rw-r--r--
2023-11-28 08:52
fxsrintrin.h
2.82
KB
-rw-r--r--
2023-11-28 08:52
gfniintrin.h
7.57
KB
-rw-r--r--
2023-11-28 08:52
hexagon_circ_brev_intrinsics.h
15.59
KB
-rw-r--r--
2023-11-28 08:52
hexagon_protos.h
374.42
KB
-rw-r--r--
2023-11-28 08:52
hexagon_types.h
130.33
KB
-rw-r--r--
2023-11-28 08:52
hresetintrin.h
1.36
KB
-rw-r--r--
2023-11-28 08:52
htmintrin.h
6.14
KB
-rw-r--r--
2023-11-28 08:52
htmxlintrin.h
9.01
KB
-rw-r--r--
2023-11-28 08:52
hvx_hexagon_protos.h
254.26
KB
-rw-r--r--
2023-11-28 08:52
ia32intrin.h
12.72
KB
-rw-r--r--
2023-11-28 08:52
immintrin.h
23.57
KB
-rw-r--r--
2023-11-28 08:52
intrin.h
28.22
KB
-rw-r--r--
2023-11-28 08:52
inttypes.h
2.26
KB
-rw-r--r--
2023-11-28 08:52
invpcidintrin.h
764
B
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2023-11-28 08:52
iso646.h
656
B
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2023-11-28 08:52
keylockerintrin.h
17.98
KB
-rw-r--r--
2023-11-28 08:52
larchintrin.h
7.8
KB
-rw-r--r--
2023-11-28 08:52
limits.h
3.61
KB
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2023-11-28 08:52
lwpintrin.h
5
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2023-11-28 08:52
lzcntintrin.h
3.18
KB
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2023-11-28 08:52
mm3dnow.h
4.5
KB
-rw-r--r--
2023-11-28 08:52
mm_malloc.h
1.88
KB
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2023-11-28 08:52
mmintrin.h
55.98
KB
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2023-11-28 08:52
module.modulemap
3.33
KB
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2023-11-28 08:52
movdirintrin.h
1.57
KB
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2023-11-28 08:52
msa.h
25.01
KB
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2023-11-28 08:52
mwaitxintrin.h
2.19
KB
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2023-11-28 08:52
nmmintrin.h
709
B
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2023-11-28 08:52
opencl-c-base.h
30.38
KB
-rw-r--r--
2023-11-28 08:52
opencl-c.h
874.39
KB
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2023-11-28 08:52
pconfigintrin.h
1.19
KB
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2023-11-28 08:52
pkuintrin.h
934
B
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2023-11-28 08:52
pmmintrin.h
10.5
KB
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2023-11-28 08:52
popcntintrin.h
1.82
KB
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2023-11-28 08:52
prfchiintrin.h
2.02
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2023-11-28 08:52
prfchwintrin.h
2.06
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2023-11-28 08:52
ptwriteintrin.h
1.05
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2023-11-28 08:52
raointintrin.h
6.59
KB
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2023-11-28 08:52
rdpruintrin.h
1.59
KB
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2023-11-28 08:52
rdseedintrin.h
2.85
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2023-11-28 08:52
riscv_ntlh.h
855
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2023-11-28 08:52
rtmintrin.h
1.25
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2023-11-28 08:52
s390intrin.h
604
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2023-11-28 08:52
serializeintrin.h
881
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2023-11-28 08:52
sgxintrin.h
1.77
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2023-11-28 08:52
sha512intrin.h
5.95
KB
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2023-11-28 08:52
shaintrin.h
7.37
KB
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2023-11-28 08:52
sifive_vector.h
522
B
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2023-11-28 08:52
sm3intrin.h
7.29
KB
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2023-11-28 08:52
sm4intrin.h
8.2
KB
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2023-11-28 08:52
smmintrin.h
99.32
KB
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2023-11-28 08:52
stdalign.h
911
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2023-11-28 08:52
stdarg.h
1.66
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2023-11-28 08:52
stdatomic.h
8.3
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2023-11-28 08:52
stdbool.h
1.04
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2023-11-28 08:52
stddef.h
4.16
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2023-11-28 08:52
stdint.h
32.49
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2023-11-28 08:52
stdnoreturn.h
1.17
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2023-11-28 08:52
tbmintrin.h
3.15
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2023-11-28 08:52
tgmath.h
29.68
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2023-11-28 08:52
tmmintrin.h
29.51
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2023-11-28 08:52
tsxldtrkintrin.h
1.97
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2023-11-28 08:52
uintrintrin.h
4.96
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2023-11-28 08:52
unwind.h
11.21
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2023-11-28 08:52
vadefs.h
1.39
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2023-11-28 08:52
vaesintrin.h
2.46
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2023-11-28 08:52
varargs.h
477
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2023-11-28 08:52
vecintrin.h
360.82
KB
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2023-11-28 08:52
velintrin.h
2.1
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2023-11-28 08:52
velintrin_approx.h
3.54
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2023-11-28 08:52
velintrin_gen.h
69.06
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2023-11-28 08:52
vpclmulqdqintrin.h
1.06
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2023-11-28 08:52
waitpkgintrin.h
1.33
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2023-11-28 08:52
wasm_simd128.h
76.25
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2023-11-28 08:52
wbnoinvdintrin.h
749
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2023-11-28 08:52
wmmintrin.h
659
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2023-11-28 08:52
x86gprintrin.h
2.32
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2023-11-28 08:52
x86intrin.h
1.81
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2023-11-28 08:52
xmmintrin.h
106.73
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2023-11-28 08:52
xopintrin.h
19.96
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2023-11-28 08:52
xsavecintrin.h
2.51
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2023-11-28 08:52
xsaveintrin.h
1.64
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2023-11-28 08:52
xsaveoptintrin.h
1
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2023-11-28 08:52
xsavesintrin.h
1.24
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-rw-r--r--
2023-11-28 08:52
xtestintrin.h
873
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2023-11-28 08:52
Save
Rename
/*===---- bmiintrin.h - BMI intrinsics -------------------------------------=== * * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. * See https://llvm.org/LICENSE.txt for license information. * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception * *===-----------------------------------------------------------------------=== */ #if !defined __X86INTRIN_H && !defined __IMMINTRIN_H #error "Never use <bmiintrin.h> directly; include <x86intrin.h> instead." #endif #ifndef __BMIINTRIN_H #define __BMIINTRIN_H /* Allow using the tzcnt intrinsics even for non-BMI targets. Since the TZCNT instruction behaves as BSF on non-BMI targets, there is code that expects to use it as a potentially faster version of BSF. */ #define __RELAXED_FN_ATTRS __attribute__((__always_inline__, __nodebug__)) #define _tzcnt_u16(a) (__tzcnt_u16((a))) /// Counts the number of trailing zero bits in the operand. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the <c> TZCNT </c> instruction. /// /// \param __X /// An unsigned 16-bit integer whose trailing zeros are to be counted. /// \returns An unsigned 16-bit integer containing the number of trailing zero /// bits in the operand. static __inline__ unsigned short __RELAXED_FN_ATTRS __tzcnt_u16(unsigned short __X) { return __builtin_ia32_tzcnt_u16(__X); } /// Counts the number of trailing zero bits in the operand. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the <c> TZCNT </c> instruction. /// /// \param __X /// An unsigned 32-bit integer whose trailing zeros are to be counted. /// \returns An unsigned 32-bit integer containing the number of trailing zero /// bits in the operand. /// \see _mm_tzcnt_32 static __inline__ unsigned int __RELAXED_FN_ATTRS __tzcnt_u32(unsigned int __X) { return __builtin_ia32_tzcnt_u32(__X); } /// Counts the number of trailing zero bits in the operand. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the <c> TZCNT </c> instruction. /// /// \param __X /// An unsigned 32-bit integer whose trailing zeros are to be counted. /// \returns An 32-bit integer containing the number of trailing zero bits in /// the operand. /// \see __tzcnt_u32 static __inline__ int __RELAXED_FN_ATTRS _mm_tzcnt_32(unsigned int __X) { return (int)__builtin_ia32_tzcnt_u32(__X); } #define _tzcnt_u32(a) (__tzcnt_u32((a))) #ifdef __x86_64__ /// Counts the number of trailing zero bits in the operand. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the <c> TZCNT </c> instruction. /// /// \param __X /// An unsigned 64-bit integer whose trailing zeros are to be counted. /// \returns An unsigned 64-bit integer containing the number of trailing zero /// bits in the operand. /// \see _mm_tzcnt_64 static __inline__ unsigned long long __RELAXED_FN_ATTRS __tzcnt_u64(unsigned long long __X) { return __builtin_ia32_tzcnt_u64(__X); } /// Counts the number of trailing zero bits in the operand. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the <c> TZCNT </c> instruction. /// /// \param __X /// An unsigned 64-bit integer whose trailing zeros are to be counted. /// \returns An 64-bit integer containing the number of trailing zero bits in /// the operand. /// \see __tzcnt_u64 static __inline__ long long __RELAXED_FN_ATTRS _mm_tzcnt_64(unsigned long long __X) { return (long long)__builtin_ia32_tzcnt_u64(__X); } #define _tzcnt_u64(a) (__tzcnt_u64((a))) #endif /* __x86_64__ */ #undef __RELAXED_FN_ATTRS #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ defined(__BMI__) /* Define the default attributes for the functions in this file. */ #define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("bmi"))) #define _andn_u32(a, b) (__andn_u32((a), (b))) /* _bextr_u32 != __bextr_u32 */ #define _blsi_u32(a) (__blsi_u32((a))) #define _blsmsk_u32(a) (__blsmsk_u32((a))) #define _blsr_u32(a) (__blsr_u32((a))) /// Performs a bitwise AND of the second operand with the one's /// complement of the first operand. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the <c> ANDN </c> instruction. /// /// \param __X /// An unsigned integer containing one of the operands. /// \param __Y /// An unsigned integer containing one of the operands. /// \returns An unsigned integer containing the bitwise AND of the second /// operand with the one's complement of the first operand. static __inline__ unsigned int __DEFAULT_FN_ATTRS __andn_u32(unsigned int __X, unsigned int __Y) { return ~__X & __Y; } /* AMD-specified, double-leading-underscore version of BEXTR */ /// Extracts the specified bits from the first operand and returns them /// in the least significant bits of the result. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the <c> BEXTR </c> instruction. /// /// \param __X /// An unsigned integer whose bits are to be extracted. /// \param __Y /// An unsigned integer used to specify which bits are extracted. Bits [7:0] /// specify the index of the least significant bit. Bits [15:8] specify the /// number of bits to be extracted. /// \returns An unsigned integer whose least significant bits contain the /// extracted bits. /// \see _bextr_u32 static __inline__ unsigned int __DEFAULT_FN_ATTRS __bextr_u32(unsigned int __X, unsigned int __Y) { return __builtin_ia32_bextr_u32(__X, __Y); } /* Intel-specified, single-leading-underscore version of BEXTR */ /// Extracts the specified bits from the first operand and returns them /// in the least significant bits of the result. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the <c> BEXTR </c> instruction. /// /// \param __X /// An unsigned integer whose bits are to be extracted. /// \param __Y /// An unsigned integer used to specify the index of the least significant /// bit for the bits to be extracted. Bits [7:0] specify the index. /// \param __Z /// An unsigned integer used to specify the number of bits to be extracted. /// Bits [7:0] specify the number of bits. /// \returns An unsigned integer whose least significant bits contain the /// extracted bits. /// \see __bextr_u32 static __inline__ unsigned int __DEFAULT_FN_ATTRS _bextr_u32(unsigned int __X, unsigned int __Y, unsigned int __Z) { return __builtin_ia32_bextr_u32 (__X, ((__Y & 0xff) | ((__Z & 0xff) << 8))); } /* Intel-specified, single-leading-underscore version of BEXTR2 */ /// Extracts the specified bits from the first operand and returns them /// in the least significant bits of the result. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the <c> BEXTR </c> instruction. /// /// \param __X /// An unsigned integer whose bits are to be extracted. /// \param __Y /// An unsigned integer used to specify which bits are extracted. Bits [7:0] /// specify the index of the least significant bit. Bits [15:8] specify the /// number of bits to be extracted. /// \returns An unsigned integer whose least significant bits contain the /// extracted bits. /// \see __bextr_u32 static __inline__ unsigned int __DEFAULT_FN_ATTRS _bextr2_u32(unsigned int __X, unsigned int __Y) { return __builtin_ia32_bextr_u32(__X, __Y); } /// Clears all bits in the source except for the least significant bit /// containing a value of 1 and returns the result. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the <c> BLSI </c> instruction. /// /// \param __X /// An unsigned integer whose bits are to be cleared. /// \returns An unsigned integer containing the result of clearing the bits from /// the source operand. static __inline__ unsigned int __DEFAULT_FN_ATTRS __blsi_u32(unsigned int __X) { return __X & -__X; } /// Creates a mask whose bits are set to 1, using bit 0 up to and /// including the least significant bit that is set to 1 in the source /// operand and returns the result. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the <c> BLSMSK </c> instruction. /// /// \param __X /// An unsigned integer used to create the mask. /// \returns An unsigned integer containing the newly created mask. static __inline__ unsigned int __DEFAULT_FN_ATTRS __blsmsk_u32(unsigned int __X) { return __X ^ (__X - 1); } /// Clears the least significant bit that is set to 1 in the source /// operand and returns the result. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the <c> BLSR </c> instruction. /// /// \param __X /// An unsigned integer containing the operand to be cleared. /// \returns An unsigned integer containing the result of clearing the source /// operand. static __inline__ unsigned int __DEFAULT_FN_ATTRS __blsr_u32(unsigned int __X) { return __X & (__X - 1); } #ifdef __x86_64__ #define _andn_u64(a, b) (__andn_u64((a), (b))) /* _bextr_u64 != __bextr_u64 */ #define _blsi_u64(a) (__blsi_u64((a))) #define _blsmsk_u64(a) (__blsmsk_u64((a))) #define _blsr_u64(a) (__blsr_u64((a))) /// Performs a bitwise AND of the second operand with the one's /// complement of the first operand. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the <c> ANDN </c> instruction. /// /// \param __X /// An unsigned 64-bit integer containing one of the operands. /// \param __Y /// An unsigned 64-bit integer containing one of the operands. /// \returns An unsigned 64-bit integer containing the bitwise AND of the second /// operand with the one's complement of the first operand. static __inline__ unsigned long long __DEFAULT_FN_ATTRS __andn_u64 (unsigned long long __X, unsigned long long __Y) { return ~__X & __Y; } /* AMD-specified, double-leading-underscore version of BEXTR */ /// Extracts the specified bits from the first operand and returns them /// in the least significant bits of the result. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the <c> BEXTR </c> instruction. /// /// \param __X /// An unsigned 64-bit integer whose bits are to be extracted. /// \param __Y /// An unsigned 64-bit integer used to specify which bits are extracted. Bits /// [7:0] specify the index of the least significant bit. Bits [15:8] specify /// the number of bits to be extracted. /// \returns An unsigned 64-bit integer whose least significant bits contain the /// extracted bits. /// \see _bextr_u64 static __inline__ unsigned long long __DEFAULT_FN_ATTRS __bextr_u64(unsigned long long __X, unsigned long long __Y) { return __builtin_ia32_bextr_u64(__X, __Y); } /* Intel-specified, single-leading-underscore version of BEXTR */ /// Extracts the specified bits from the first operand and returns them /// in the least significant bits of the result. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the <c> BEXTR </c> instruction. /// /// \param __X /// An unsigned 64-bit integer whose bits are to be extracted. /// \param __Y /// An unsigned integer used to specify the index of the least significant /// bit for the bits to be extracted. Bits [7:0] specify the index. /// \param __Z /// An unsigned integer used to specify the number of bits to be extracted. /// Bits [7:0] specify the number of bits. /// \returns An unsigned 64-bit integer whose least significant bits contain the /// extracted bits. /// \see __bextr_u64 static __inline__ unsigned long long __DEFAULT_FN_ATTRS _bextr_u64(unsigned long long __X, unsigned int __Y, unsigned int __Z) { return __builtin_ia32_bextr_u64 (__X, ((__Y & 0xff) | ((__Z & 0xff) << 8))); } /* Intel-specified, single-leading-underscore version of BEXTR2 */ /// Extracts the specified bits from the first operand and returns them /// in the least significant bits of the result. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the <c> BEXTR </c> instruction. /// /// \param __X /// An unsigned 64-bit integer whose bits are to be extracted. /// \param __Y /// An unsigned 64-bit integer used to specify which bits are extracted. Bits /// [7:0] specify the index of the least significant bit. Bits [15:8] specify /// the number of bits to be extracted. /// \returns An unsigned 64-bit integer whose least significant bits contain the /// extracted bits. /// \see __bextr_u64 static __inline__ unsigned long long __DEFAULT_FN_ATTRS _bextr2_u64(unsigned long long __X, unsigned long long __Y) { return __builtin_ia32_bextr_u64(__X, __Y); } /// Clears all bits in the source except for the least significant bit /// containing a value of 1 and returns the result. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the <c> BLSI </c> instruction. /// /// \param __X /// An unsigned 64-bit integer whose bits are to be cleared. /// \returns An unsigned 64-bit integer containing the result of clearing the /// bits from the source operand. static __inline__ unsigned long long __DEFAULT_FN_ATTRS __blsi_u64(unsigned long long __X) { return __X & -__X; } /// Creates a mask whose bits are set to 1, using bit 0 up to and /// including the least significant bit that is set to 1 in the source /// operand and returns the result. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the <c> BLSMSK </c> instruction. /// /// \param __X /// An unsigned 64-bit integer used to create the mask. /// \returns An unsigned 64-bit integer containing the newly created mask. static __inline__ unsigned long long __DEFAULT_FN_ATTRS __blsmsk_u64(unsigned long long __X) { return __X ^ (__X - 1); } /// Clears the least significant bit that is set to 1 in the source /// operand and returns the result. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the <c> BLSR </c> instruction. /// /// \param __X /// An unsigned 64-bit integer containing the operand to be cleared. /// \returns An unsigned 64-bit integer containing the result of clearing the /// source operand. static __inline__ unsigned long long __DEFAULT_FN_ATTRS __blsr_u64(unsigned long long __X) { return __X & (__X - 1); } #endif /* __x86_64__ */ #undef __DEFAULT_FN_ATTRS #endif /* !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) \ || defined(__BMI__) */ #endif /* __BMIINTRIN_H */